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Fu-Chien Chiu, "Surface State Capture Cross-Section at the Interface between Silicon and Hafnium Oxide", Advances in Materials Science and Engineering, vol. 2013, Article ID 950439, 5 pages, 2013. https://doi.org/10.1155/2013/950439
Surface State Capture Cross-Section at the Interface between Silicon and Hafnium Oxide
The interfacial properties between silicon and hafnium oxide (HfO2) are explored by the gated-diode method and the subthreshold measurement. The density of interface-trapped charges, the current induced by surface defect centers, the surface recombination velocity, and the surface state capture cross-section are obtained in this work. Among the interfacial properties, the surface state capture cross-section is approximately constant even if the postdeposition annealing condition is changed. This effective capture cross-section of surface states is about 2.4 × 10−15 cm2, which may be an inherent nature in the HfO2/Si interface.
Hafnium oxide (HfO2) has emerged recently as an essential dielectric material in the semiconductor industry, currently being used in logic gate stacks  and considered a promising candidate for resistance switching memory devices [2, 3] as well as surface passivation of advanced Si solar cells [4, 5]. Therefore, the determination of surface state capture cross-section at the interface between silicon and hafnium oxide is of great importance for the semiconductor industry, the photovoltaic industry, and the scientific community. The known characteristics of HfO2 thin films include a large band gap (~6 eV) , a relatively high dielectric constant (>20) , an acceptable breakdown strength (>4 MV/cm) , excellent thermodynamic stability , and an effective mass of carrier transportation . In this work, the interface characteristics of the interface-trapped charge density (), the interface-trapped charge density per area and energy (), the effective capture cross-section () of surface states, the surface recombination velocity (), and the minority carrier lifetime () are identified. The typically electrical measurements of current-voltage () and capacitance-voltage () characteristics were performed on the Al/HfO2/p-Si metal-oxide-semiconductor (MOS) capacitors and metal-oxide-semiconductor field-effect transistors (MOSFETs). Both gated-diode method [10, 11] and subthreshold measurement  were applied to evaluate the capture cross-section of interface states for the HfO2-gated MOSFETs. The gated-diode method is a simple way to accurately identify the interfacial characteristics using only a sweeping dc gate voltage, which was introduced in 1966 by Grove and Fitzgerald  to determine the surface-state density in MOS structures. According to the gated-diode measurements, the surface recombination velocity and the minority carrier lifetime () in the field-induced depletion region were extracted. In addition, the interface-trapped charge density per area and energy () was determined by using the device subthreshold measurement. Consequently, the effective capture cross-section of surface states was determined to be about 2.4 × 10−15 cm2 by the combination of gated-diode and device subthreshold measurements.
Here, (100) -type silicon wafers (1–5 Ω-cm) were used as the starting material. Following the standard cleaning procedures, a 500 nm SiO2 film was grown on silicon wafers by wet oxidation. The source and drain windows were defined by wet etching and doped by phosphorous diffusion. The HfO2 films were deposited by RF magnetron sputtering in argon ambient at room temperature. The flow rate of argon was 13.5 standard cubic centimeters per minute (sccm). The total pressure during deposition was 20 mtorr. The refractive index, energy bandgap, and thickness of these thin films were measured by an N&K analyzer. The optical refractive index () and energy bandgap () were around 1.9–2.1 and 5.6–5.8 eV, respectively. The deposited thicknesses of HfO2 thin films ranged from 12 nm to 47.1 nm. After HfO2 deposition, the postdeposition anneal (PDA) was performed in either N2 or N2/O2 (i.e., 50% N2 and 50% O2) with a flow rate of 3 sccm for 60 s at 500°C. According to the X-ray diffraction analysis, the HfO2 films annealed at 500°C were amorphous. The aluminum (Al) electrodes were evaporated and patterned using a wet etching process. Postmetallization annealing (PMA) was performed at 400°C in N2 for 30 s. The Al/HfO2/-Si MOS capacitors and MOSFETs were measured by Agilent 4156C semiconductor parameter analyzer and Agilent 4284A impedance analyzer. All the measurements were performed under dark condition. Based on the high-frequency (1 MHz) measurements for the MOS capacitors, the effective dielectric constant of HfO2 films annealed at 500°C in N2 or N2/O2 was evaluated as 18.9 or 19.3, respectively (not shown here). In this work, the relatively large devices were chosen to avoid the short channel effects which may cause the distortion in analysis of surface state capture cross-section. The channel width () is 100 μm and the channel length () is 19 μm.
3. Results and Discussion
The drastic irregularity of the oxide/Si interface should introduce a large amount of density of states into the forbidden gap near the interface. The interface state may cause the charge trapping and lead to the device instability as well as the degradation of subthreshold swing, off-state current, carrier mobility, and oxide reliability. Charge carriers can be trapped or captured while they come to the physical vicinity of the center of the interface state. The capture cross-section () of the center is a measure of how close the carrier has to come to the center to be captured. In this work, the gated-diode method is used to identify the interface-trapped charge density (), the surface recombination velocity (), and the minority carrier lifetime () in the field-induced depletion region for the nMOSFET devices using HfO2 gate dielectrics annealed at 500°C. The test structure described by Grove and Fitzgerald to investigate surface properties in MOS structures is identical to a MOSFET without or with an unconnected source region. In this work, the gated-diode measurement was made using a floating source and a grounded substrate on MOSFET structures, as shown in Figure 1(a). The drain is reversely biased with respect to the substrate (). According to the theory of gated-diode method, the reverse current of junctions () is a function of the gate bias (). The - characteristics may exhibit three distinct regions , as indicated in Figure 1(b). The reverse current of junctions comes from the generation of electron-hole pairs at generation-recombination centers in the depletion region at room temperature. Hence, the magnitude of reverse current depends on the density of such centers and the volume of the depletion region. As the volume of the depletion region in gated diodes depends on the gate voltage, reverse current also depends on the gate voltage. The HfO2/silicon interface is in the accumulation mode when is less than the flat band voltage , and the reverse diode current originates from the generation-recombination centers in the depletion region of the metallurgical junction (). When (where is the threshold voltage), the field-induced junction is depleted, and the rapid increase in the reverse diode current is caused by the generation of electron-hole pairs at the generation-combination centers of the surface region () and the field-induced junction depletion region (). At , the field-induced junction is in the inversion mode and the reverse diode current is reduced by the filling of the interface-trapped charge states by the minority carriers. The magnitude of the reverse diode current is the sum of the generation currents in the depletion volume of the field-induced junction and in that of the metallurgical junction. Based on the Shockley-Read-Hall theory for the single-level centers , the equations for the gated-diode are written as follows [13–15]: where cm−3 is the intrinsic carrier concentration in silicon ; represents the area of the metallurgical junction; cm−2 is the gate area; is the surface recombination velocity; is the effective capture cross-section area; = 107 cm/s is the thermal velocity; is the built-in potential of the junction; is the quasi-Fermi potential of the majority carriers of the substrate; is the width of the depletion region of the metallurgical junction; is the maximum width of the surface depletion region; is the minority carrier lifetime in the field-induced depletion region; is the interface-trapped charge density (i.e., density of the single-level surface generation-recombination centers per unit area); is the interface-trapped charge density per area and energy (i.e., the density of uniformly distributed surface generation-recombination centers per unit area and energy); and , , and are the generation and recombination rates of carriers per unit volume in the depletion regions of the metallurgical, the surface region, and field-induced region, respectively.
Figure 2 shows the reverse diode current versus for the HfO2 gated-diodes at V. Through the gated diode method, the surface recombination velocity () and the minority carrier lifetime () in the field-induced depletion region can be extracted. For HfO2 films annealed in N2/O2, and are determined to be 4.1 × 103 cm/s and 16 ns. On the other hand, for HfO2 films annealed in N2, and are determined to be 8.9 × 103 cm/s and 22 ns. Obviously, the reverse diode current of nMOSFETs for HfO2 annealed at 500°C in N2/O2 is smaller than that annealed in N2. The reduction in reverse current may be attributed to the decrease in oxygen vacancy related defects [16–19] in HfO2. The oxygen vacancy is one type of trapping centers and is easily formed in HfO2 due to the transportation of oxygen atoms from HfO2 into Si [18, 19]. During the thermal treatment of PDA in N2/O2 ambient, the oxygen atoms can diffuse into the HfO2 films to partially passivate the existing oxygen vacancies. Hence, the reverse diode current can be reduced by N2/O2 annealing.
Figure 3 shows the characteristics. The ratio is larger than 106 at V, indicating that the nMOSFETs with amorphous HfO2 gate dielectrics have a good current switch capability. The subthreshold swings () for the HfO2 gate dielectrics annealed at 500°C in N2 and N2/O2 are about 85.1 and 76.4 mV/dec, respectively. According to Figure 3, the density of interface traps per area and energy () can be determined from the subthreshold swing measurement, because is expressed as , where is the depletion-layer capacitance, is the capacitance associated with the interface traps, and is the dielectric capacitance. The determined is about 4.6 × 1012 and 2.1 × 1012 cm−2-eV−1 for HfO2 annealed at 500°C in N2 and N2/O2, respectively. Once is determined, and can be extracted using (4). For HfO2 annealed in N2, and are extracted to be about 2.4 × 10−15 cm2 and 3.7 × 1011 cm−2, respectively; for HfO2 annealed in N2/O2, and are extracted to be 2.4 × 10−15 cm2 and 1.7 × 1011 cm−2, respectively. It is worthy of note that the same value is obtained for HfO2 annealed both in N2 and in N2/O2. This finding may imply that the capture cross-section of surface states is an inherent nature at the HfO2/Si interface. The universal constant of surface state capture cross-section is around 2.4 × 10−15 cm2.
Figure 4 shows the channel electron mobility versus the effective electric field. The effective surface field () and effective channel mobility () can be expressed as and , respectively, where is the inversion layer charge, is the bulk depletion layer charge, and is the dielectric constant of Si. The linear approximation of , , is used in evaluating the mobility. The rest of the symbols have been defined earlier. The maximum channel electron mobility for the HfO2 annealed in N2/O2 and N2 was determined to be 102 and 43 cm2/V s, respectively. Evidently the HfO2 film annealed in N2 shows lower channel electron mobility than the film annealed in N2/O2 condition. In addition, the HfO2 device has a lowered mobility as compared to a universal mobility curve in SiO2 MOSFETs . The lowered mobility may come from the larger surface states which cause the increased interface charge scattering .
Table 1 lists the capture cross-sections of surface states () at the interface between silicon and oxides, for example, SiO2, ZrO2, Al2O3, CeO2, and HfO2 [22–29]. For SiO2, the value is 1–4 × 10−16 cm2 [22–24] which is smaller than those of high-k dielectrics. For CeO2, the value is around 9 × 10−15 cm2 even if the adopted measurement method is different [27, 28]. In this work, the experimental results show that the HfO2 films annealed in N2/O2 have lower interface state density () and higher channel electron mobility () compared to the HfO2 films annealed in N2. Although the different PDA conditions lead to the different values of and , the same for HfO2 deposited by rf magnetron sputtering is obtained to be around 2.4 × 10−15 cm2. This finding may suggest that the capture cross-section of surface states for some thin film deposition method may be an inherent nature at the interface between silicon and hafnium oxide. It is worthy to note that the capture cross-section of surface states may be influenced by the factors of environment temperature, film thickness, film deposition method, and especially surface preparation of Si substrate prior to HfO2 deposition.
|PECVD: plasma-enhanced chemical vapor deposition, DLTS: deep-level transient spectroscopy, and ALD: atomic layer deposition.|
The electrical properties at the HfO2/Si interface are investigated by the gated-diode method and the subthreshold measurement. Although the HfO2 films annealed in N2/O2 result in lower interface state density and higher channel electron mobility compared to the HfO2 films annealed in N2, the determined surface state capture cross-section at the HfO2/Si interface is the same. This suggests that the surface state capture cross-section may be an inherent nature at the interface between silicon and hafnium oxide.
Conflict of Interests
The author declares that there is no conflict of interests regarding the publication of this paper.
The author would like to thank the National Science Council of Taiwan, for supporting this work under Contract no. NSC 102-2221-E-015-MY2.
- G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-k gate dielectrics: current status and materials properties considerations,” Journal of Applied Physics, vol. 89, no. 10, pp. 5243–5275, 2001.
- H.-S. P. Wong, H.-Y. Lee, S. Yu et al., “Metal-oxide RRAM,” Proceedings of IEEE, vol. 100, no. 6, pp. 1951–1970, 2012.
- Y. H. Wu, D. J. Wouters, P. Hendrickx et al., “On the bipolar resistive switching memory using TiN/Hf/HfO2/Si MIS structure,” IEEE Electron Device Letters, vol. 34, no. 3, pp. 414–416, 2013.
- F. Lin, B. Hoex, Y. H. Koh, J. Lin, and A. G. Aberle, “Low-temperature surface passivation of moderately doped crystalline silicon by atomic-layer-deposited hafnium oxide films,” ECS Journal of Solid State Science and Technology, vol. 2, no. 1, pp. N11–N14, 2013.
- J. Wang, S. Sadegh Mottaghian, and M. Farrokh Baroughi, “Passivation properties of atomic-layer-deposited hafnium and aluminum oxides on Si surfaces,” IEEE Transactions on Electron Devices, vol. 59, no. 2, pp. 342–348, 2012.
- J. Robertson, “Band offsets of wide-band-gap oxides and implications for future electronic devices,” Journal of Vacuum Science and Technology B, vol. 18, no. 3, pp. 1785–1791, 2000.
- J. McPherson, J.-Y. Kim, A. Shanware, and H. Mogul, “Thermochemical description of dielectric breakdown in high dielectric constant materials,” Applied Physics Letters, vol. 82, no. 13, pp. 2121–2123, 2003.
- K. J. Hubbard and D. G. Schlom, “Thermodynamic stability of binary oxides in contact with silicon,” Journal of Materials Research, vol. 11, no. 11, pp. 2757–2776, 1996.
- F.-C. Chiu, “Interface characterization and carrier transportation in metal/HfO2/silicon structure,” Journal of Applied Physics, vol. 100, no. 11, Article ID 114102, 5 pages, 2006.
- A. S. Grove and D. J. Fitzgerald, “Surface effects on P-N junctions: characteristics of surface space-charge regions under non-equilibrium conditions,” Solid State Electronics, vol. 9, no. 8, pp. 783–806, 1966.
- T. Giebel and K. Goser, “Hot carrier degradation of n-channel MOSFET's characterized by a gated-diode measurement technique,” IEEE Electron Device Letter, vol. 10, no. 2, pp. 76–78, 1989.
- S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, John Wiley & Sons, Hoboken, NJ, USA, 3rd edition, 2006.
- P. L. Castro and B. E. Doal, “Low-temperature reduction of fast surface states associated with thermally oxidized silicon,” Journal of the Electrochemical Society, vol. 118, no. 2, pp. 280–286, 1971.
- P. C. T. Roberts and J. D. E. Beynon, “An experimental determination of the carrier lifetime near the Si-SiO2 interface,” Solid-State Electronics, vol. 16, no. 2, pp. 221–227, 1973.
- F.-C. Chiu, W.-C. Shih, J. Y.-M. Lee, and H.-L. Hwang, “An investigation of surface state capture cross-sections for metal-oxide-semiconductor field-effect transistors using HfO2 gate dielectrics,” Microelectronics Reliability, vol. 47, no. 4-5, pp. 548–551, 2007.
- K. Shiraishi, K. Yamada, K. Torii et al., “Oxygen-vacancy-induced threshold voltage shifts in Hf-related high-k gate stacks,” Thin Solid Films, vol. 508, no. 1-2, pp. 305–310, 2006.
- K. Tse, D. Liu, K. Xiong, and J. Robertson, “Oxygen vacancies in high-k oxides,” Microelectronic Engineering, vol. 84, no. 9-10, pp. 2028–2031, 2007.
- K. Xiong and J. Robertson, “Point defects in HfO2 high K gate oxide,” Microelectronic Engineering, vol. 80, pp. 408–411, 2005.
- H. Takeuchi, H. Y. Wong, D. Ha, and T. J. King, “Impact of oxygen vacancies on high-k gate stack engineering,” in Proceedings of the 50th IEEE International Electron Devices Meeting (IEDM ’04), pp. 829–832, 2004.
- S.-I. Takagi, A. Toriumi, M. Iwase, and H. Tango, “On the universality of inversion layer mobility in Si MOSFET's: part I-effects of substrate impurity concentration,” IEEE Transactions on Electron Devices, vol. 41, no. 12, pp. 2357–2362, 1994.
- J. R. Hauser, “Extraction of experimental mobility data for MOS devices,” IEEE Transactions on Electron Devices, vol. 43, no. 11, pp. 1981–1988, 1996.
- D. K. Schroder, Semiconductor Material and Device Characterization, John Wiley & Sons, Hoboken, NJ, USA, 3rd edition, 2006.
- P. Masson, J.-L. Autran, and G. Ghibaudo, “An Improved time domain analysis of the charge pumping current,” Journal of Non-Crystalline Solids, vol. 280, no. 1–3, pp. 255–260, 2001.
- G. Groeseneken, H. E. Maes, N. Beltran, and R. F. de Keersmaecker, “A reliable approach to charge-pumping measurements in MOS transistors,” IEEE Transactions on Electron Devices, vol. 31, no. 1, pp. 42–53, 1984.
- C.-H. Liu and F.-C. Chiu, “Electrical characterization of ZrO2/Si interface properties in MOSFETs with ZrO2 gate dielectrics,” IEEE Electron Device Letters, vol. 28, no. 1, pp. 62–64, 2007.
- P. Saint-Cast, Y. H. Heo, E. Billot et al., “Variation of the layer thickness to study the electrical property of PECVD Al2O3/c-Si interface,” Energy Procedia, vol. 8, pp. 642–647, 2011.
- C.-H. Chen, I. Y.-K. Chang, J. Y.-M. Lee, and F.-C. Chiu, “Electrical characterization of CeO2 Si interface properties of metal-oxide-semiconductor field-effect transistors with CeO2 gate dielectric,” Applied Physics Letters, vol. 92, no. 4, Article ID 043507, 3 pages, 2008.
- F.-C. Chiu, S.-Y. Chen, C.-H. Chen, H.-W. Chen, H.-S. Huang, and H.-L. Hwang, “Interfacial and electrical characterization in metal-oxide-semiconductor field-effect transistors with CeO2 gate dielectric,” Japanese Journal of Applied Physics, vol. 48, no. 4, Article ID 04C014, 4 pages, 2009.
- J.-P. Han, E. M. Vogel, E. P. Gusev et al., “Energy distribution of interface traps in high-k gated MOSFETs,” in Proceedings of the Symposium on VLSI Technology, pp. 161–162, June 2003.
Copyright © 2013 Fu-Chien Chiu. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.