Research Article
A Split Island Layout Style of Butting/Inserted Substrate Pickups for NMOSFET ESD Reliability
Figure 3
(a) TLP curve comparison among the GGNMOS and various butting pickup conditions with 1.8 V power supply. (b) TLP curve comparison among the GGNMOS and various inserted pickup conditions with 1.8 V power supply. (c) TLP curve comparison among the normal GGNMOS and various butting/inserted pickup conditions with 3.3 V power supply.
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