Abstract

We discuss our approach to monolithic intergration of Ge photodectors with CMOS electronics for high-speed optical transceivers. Receivers based on Ge waveguide photodetectors achieve a sensitivity of 14.2 dBm (  bit error rate (BER)) at 10 Gbps and 1550 nm.

1. Introduction

Monolithic integration of optical components on an Si platform has been pursued for a long time for its potential advantages over hybrid approaches: lower assembly cost, compactness, channel count, scalability to high-volume production. Integration in a CMOS platform, in particular, is very attractive because of the very low cost-per-unit attainable with this technology.

Several optical building blocks have been demonstrated already on Si: waveguides [1], high-speed modulators [2], photodetectors [3], and complete transceiver systems have been demonstrated as well by Luxtera with its recently introduced 40 Gbps (4 channel, 10 Gbps each) monolithic optical transceiver built on an Si CMOS platform [4].

While waveguiding and modulation can be done in Si and do not require the integration of new materials in the CMOS process, photodetection at long wavelengths (1.3 μm and 1.55 μm) requires either Germanium or a III–V compound such as InGaAs. The former is preferred over the latter due to its better compatibility with the Si technology in terms of lattice structure and parameter and contamination concerns. Germanium on Si photodetectors has been demonstrated by several research groups with high responsivity and speed and relatively low dark current [58], however, none of the published devices is integrated in a CMOS process along with standard Si transistors.

In this paper, we first describe our approach to integration of a Ge module for photodetectors in LuxG, Luxtera's optical-enabled CMOS process based on Freescale's hip7_soi, then we introduce the world's first monolithic high-speed optical receiver based on Ge waveguide photodetectors.

2. Technology

SiGe alloys are commonly found in today's Si technologies both bipolar, as the base layer in heterojunction bipolar transistors (HBTs) [9], and CMOS, as channel “stressors” for p-channel field effect transistors [10]. Unfortunately, the absorption coefficient of the low-Ge-content alloys used in these applications is too weak to be useful for efficient photodetection at 1.5 μm. On the contrary, pure Ge shows very high absorption coefficient up to 1.55 μm, thanks to the direct transitions occurring at the gamma point of its band structure at energies above 0.8 eV. While the use of 100% Ge fet is envisioned as a solution to address the mobility degradation induced by the extreme gate length scaling dictated by the ITRS roadmap [11], several issues remain to be solved before the first product based on this technology faces high volume production, with gate oxide formation and leakage reduction being, probably, the most formidable [12]. Luckily enough, the use of 100% Ge for photodetectors does not imply the formation of a high quality, chemically compatible, high-K, ultrathin dielectric, as it is the case for fets, and the leakage attainable by Ge on Si diodes is high but still compatible with high-speed receivers operation [13].

Ge can be epitaxially grown on Si, despite the large difference in lattice parameter (4%), using buffering techniques [14]. The buffer is used to plastically relax the strain induced by the lattice mismatch, usually through controlled creation of dislocations, therefore allowing a layer-by-layer, flat, film growth. Among the different approaches found in literature, the low-temperature buffering technique introduced in [15] is very attractive for integration in a CMOS process since it does not require thick (and long) growths thus simplifying the insertion of the Ge film in the limited headroom allowed to a CMOS fet. Ge films grown using this technique have been shown to have less than 107 cm2 dislocation density, improving consistently after thermal cycling [16], though the high temperature required by the latter limits its use in a CMOS flow. Ge epitaxy in a CVD environment is, usually, naturally selective to oxide thus allowing for selective deposition in the areas where the detector has to be fabricated using a hard mask. Selectivity can be improved by adding HCl to the gas flow. When it comes to choose the insertion point of the Ge epitaxy step within a CMOS process, several factors must be considered: the temperature profile of the process, the possibility to contact the Ge device using the standard Si contact module, the salicide sensitivity to thermal treatments, the availability of a clean Si surface, the presence of dielectric films, and their interaction on the selective growth of Ge. All these requirements may differ among different technology nodes and need to be carefully evaluated to ensure a seamless integration. LuxG, the Ge-enabled Luxtera process, integrates the Ge epitaxy step at the end of the front-end processing and before the contact module (see Figure 1). Epitaxy is performed in an RPCVD reactor for 8′′ wafers using GeH4 and hydrogen as the carrier gas.

While forcing the detector to share the same contact module of a transistor greatly simplifies its integration, it also constraints the maximum thickness that can be used for the Ge epitaxy to a fraction of a micron. This fact rules out the possibility to integrate surface illuminated detectors which, given the penetration depth of 1.5 μm light in Ge, require an absorption length (i.e., thickness) larger than 2 micron. Waveguide photodetectors can be used, instead, since absorption in these devices occurs along propagation of the optical beam parallel to the growth surface (see Figure 2), thus transforming the thickness constraint in a waveguide length requirement. Waveguide photodetectors have other advantages over surface illuminated ones, the most relevant being the decoupling of light absorption and photocarrier drift directions which allows for independent optimization of absorption on one side and collection efficiency and speed on the other.

3. LuxG Waveguide Photodetectors

LuxG waveguide photodetectors have a p-i-n structure in which both anode and cathode are formed on Ge by ion implantation. While other contact configurations, such as the heterojunction one with one electrode on Ge and the other on Si, have been explored, the homojunction one proved best in terms of responsivity and speed, at the cost of a higher leakage. A pictorial view of an LuxG waveguide photodetector is shown in Figure 3. Light coupling from the Si waveguide is facilitated by the higher refractive index of Ge and total absorption at 1550 nm occurs in 28 μm which is the detector length. A typical current/voltage characteristic in the dark and under illumination is shown in Figure 4. At a typical operating voltage of 1 V reverse bias, the dark current is 3 μA and the responsivity is 0.85 A/W. Note that the responsivity at short circuit is 99% of that achieved in reverse bias thus allowing efficient operation at 0 V, when very high-speed operation is not required as an example for power monitor applications. The relatively high dark current of the Ge detector is due to the presence of defects in the film and at the Si/Ge interface originated by the lattice mismatch. Frequency response at 1V reverse bias is reported in Figure 5 showing an optical bandwidth in excess of 20 GHz with a well-behaved, single-pole, roll-off.

4. LuxG High-Speed Optical Receiver

LuxG waveguide photodetectors have been monolithically integrated with a full TIA-LA (transimpedance amplifier-limiting amplifier) CMOS receiver. The TIA is implemented using a three stages classic feedback architecture with peaking inductors to enhance the high-frequency response, and the LA is a 5-stage differential amplifier also using hybrid resistive-inductive loading. More details on the TIA-LA design can be found in [17]. The TIA was designed for use with a standard stand-alone, surface-illuminated detector which has a much higher capacitance than a waveguide integrated one. The potential sensitivity enhancement achievable by increasing the transimpedance gain of the TIA and enabled by the smaller photodetector capacitance (estimated to be between 10 and 15 fF) was, therefore, not exploited in this experiment. A picture of the full receiver during waferscale test is shown in Figure 6: the RF probes used to pick up the high speed signal are visible in the top part of the picture while the electrodes used to bias the TIA-LA and the detector are on the left. The light was coupled by means of a grating coupler from a fiber array, partially visible in the bottom part of the picture, to an Si waveguide feeding the photodetector. A typical eye diagram at 10 Gbps is shown in Figure 7. The TIA-LA power supply voltage was 1.4 V while the detector was biased at 0.3 V. Power level at the detector was −10.5 dBm. The measured bit error rate as a function of the optical power at the detector is shown in Figure 8 indicating a sensitivity of −14.2 dBm. The input signal for this experiment was a 10 Gbps, 27 PRBS (pseudo-random binary sequence).

5. Conclusions

In this paper, we discuss our approach to monolithic integration of near infrared Ge waveguide photodetectors in a CMOS process. Waveguide detectors with 0.85 A/W responsivity at 1550 nm and speed in excess of 20 GHz are shown. A monolithic CMOS receiver using Ge waveguide photodetectors and operating at 10 Gbps with a sensitivity better than −14 dBm is also demonstrated.

Acknowledgment

This work was partially supported by the Microsystems Technology Office at DARPA under Contract no. HR0011-05-9-0004.