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International Journal of Power Management Electronics
Volume 2008 (2008), Article ID 675173, 9 pages
Research Article

Improved Switching Characteristics of Fast Power MOSFETs Applying Solder Bump Technology

1Research Center for Microperipheric Technologies, Faculty IV — Electrical Engineering and Computer Science, Berlin Institute of Technology, Gustav-Meyer-Allee 25, 13355 Berlin, Germany
2Fraunhofer Institute for Reliability and Microintegration, Gustav-Meyer-Allee 25, 13355 Berlin, Germany

Received 30 November 2007; Accepted 18 March 2008

Academic Editor: Peter Friedrichs

Copyright © 2008 Sibylle Dieckerhoff et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The impact of a reduced package stray inductance on the switching performance of fast power MOSFETs is discussed applying advanced 3D packaging technologies. Starting from an overview over new packaging approaches, a solder bump technology using a flexible PI substrate is exemplarily chosen for the evaluation. Measurement techniques to determine the stray inductance are discussed and compared with a numerical solution based on the PEEC method. Experimental results show the improvement of the voltage utilization while there is only a slight impact on total switching losses.