Abstract

In the automatic placement of integrated circuits, the force directed relaxation (FDR) method [Goto, S. (1981). An efficient algorithm for the two-dimensional placement problem in electrical circuit layout. IEEE Trans. on Circuits and Systems, CAS-28(1), 12-18] is a good iterative optimization algorithm. In this article, an improved force directed relaxation (IFDR) method for standard cell placement is presented, which provides a more flexible and efficient cell location adjustment scheme and a more extensive searching scale for better iterative placement optimization than the FDR method. A new heuristic algorithm based on local optimization is combined with the IFDR method to improve the placement. Experiments on the Microelectronics Center of North Carolina (MCNC) standard cell benchmarks [http://www.cbl.ncsu.edu/pub/Benchmark_ dirs/Layout Synth92/] have been done, and the results show that total wire length is reduced up to 25% and by an average of 16% in comparison with that from the placement algorithm of TimberWolf7.0.