Active and Passive Electronic Components

Volume 2010 (2010), Article ID 362516, 5 pages

http://dx.doi.org/10.1155/2010/362516

## High-Input Impedance Voltage-Mode Multifunction Filter with Four Grounded Components and Only Two Plus-Type DDCCs

Department of Electronic Engineering, Ming Chi University of Technology, Taishan 243, Taiwan

Received 11 March 2010; Revised 10 May 2010; Accepted 20 May 2010

Academic Editor: Ali Umit Keskin

Copyright © 2010 Hua-Pin Chen. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

This paper introduces a novel voltage-mode multifunction biquadratic filter with single input and four outputs using two plus-type differential difference current conveyors (DDCCs) and four grounded passive components. The filter can realize inverting highpass, inverting bandpass, noninverting lowpass, and noninverting bandpass filter responses, simultaneously. It still maintains the following advantages: (i) using grounded capacitors attractive for integration and absorbing shunt parasitic capacitance, (ii) using grounded resistors at all terminals of DDCCs suitable for the variations of filter parameters and absorbing series parasitic resistances at all terminals of DDCCs, (iii) high-input impedance good for cascadability, (iv) no need to change the filter topology, (v) no need to component-matching conditions, (vi) low active and passive sensitivity performances, and (vii) simpler configuration due to the use of plus-type DDCCs only. HSPICE and MATLAB simulations results are provided to demonstrate the theoretical analysis.

#### 1. Introduction

As a current-mode active device, the differential difference current conveyor (DDCC) has the advantages of both the second-generation current conveyor (CCII) (such as large signal bandwidth, great linearity, wide dynamic range) and the differential difference amplifier (DDA) (such as high-input impedance and arithmetic operation capability) [1]. This element is a versatile building block whose applications exist in the literature [1–7]. Voltage-mode active filters with high-input impedance are of great interest because several cells of this kind can be directly connected for implementing higher-order filters [3–11]. In 2003, Chang and Chen proposed a universal voltage-mode filter with three inputs and a single output [2]. The circuit can realize all five different generic filtering responses but only highpass and bandpass responses have the advantage of high-input impedance. In 2004, Horng et al. proposed a multifunction filter with a single input and three outputs [3]. The circuit can realize highpass, bandpass, and lowpass responses, simultaneously. However, it is based on two minus-type DDCCs. In 2005, Ibrahim et al. proposed two single DDCC biquads with high-input impedance and minimum number of passive elements [4]. The highpass, bandpass, or lowpass filter responses cannot be realized in the same configuration. In 2007, Chiu and Horng proposed a universal voltage-mode filter with three inputs and a single output [5]. The circuit has high-input and low-output impedance advantages but it uses three plus-type DDCCs. In the same year, Chen proposed a universal voltage-mode filter based on two plus-type DDCCs [6]. The proposed configuration suffers from high-input impedance. Recently, Horng proposed another universal voltage-mode filter with three inputs and five outputs [7]. However, it still uses three plus-type DDCCs. In this paper, a new voltage-mode multifunction biquadratic circuit with single input and four outputs is presented. The proposed circuit employs only two plus-type DDCCs, two grounded capacitors, and two grounded resistors. It has the same advantages reported by Horng et al. [3], such as realization of highpass (HP), bandpass (BP), and lowpass (LP) filter responses from the same configuration, no requirements for component-matching conditions, the use of only grounded capacitors and resistors, high-input impedance, and low active and passive sensitivity performances. Moreover, the proposed circuit is simpler in configuration than the old circuit, since the use of only plus-type of DDCC is simpler than minus-type one like a CCII [11].

#### 2. Circuit Description

The DDCC is a five-terminal analog building block and its terminal relations are given by , , and [1]. The proposed multifunction biquadratic circuit comprises two plus-type DDCCs, two grounded capacitors, and two grounded resistors, as shown in Figure 1. The use of grounded capacitors makes the circuit suitable for integration because grounded capacitor circuit can compensate for the stay capacitances at their nodes [12, 13]. Derived by each nodal equation of the proposed, the input-output relationship matrix form of Figure 1 can be expressed as where and .

To derive (1), all the , , and terminals of DDCC are high-impedance terminals, since they are connected to gates of MOS devices in actual implementation, whereas the port is low-impedance terminal [1]. Similarly the port also exhibits high impedance since it is connected to the output stage of current mirror. From (1), the following four output voltages can be derived as

Thus, we can obtain an inverting BP, a non-inverting LP, an inverting HP, and a non-inverting BP filter response at the output voltages; , , , and , respectively. In order to realize allpass and bandstop filter functions, the unity gain voltage difference amplifier is needed. Due to the fact that input voltage signal is connected directly to the port of the DDCC() and input current to the port is zero, the circuit has the feature of high-input impedance. The employs of only plus-type DDCCs simplify the circuit configuration.

The resonance angular frequency , quality factor , and bandwidth BW are given by Equation (3), the parameters , and BW can be orthogonally adjusted by resistor while the orthogonal tuning and can be achieved by simultaneous adjustment of and such that . It must be noted that the use of grounded resistors in the proposed circuit will benefit by an easier electronic tunability. Thus, for the case of can be solved by using two MOSFETs to replace and with its gate connected by the same voltage control [14, 15]. Several realizations of tunable grounded resistors exist in the literature [16, 17].

#### 3. Effect of Nonidealities

Take into account the nonidealities of a DDCC, namely, and , where , , , , and are the intrinsic resistance at the terminal, the parasitic current gain at the terminal to the terminal, the parasitic voltage gain at the terminal to the terminal, the parasitic voltage gain at the terminal to the terminal, and the parasitic voltage gain at the terminal to the terminal, respectively. These parasitic components limit the high-frequency operation of the circuit and can be modeled with the following first-order functions [18]:

In (4), the pole frequencies , , , and depend on the technological parameters and ideally approach infinity. The operation frequency of the presented filter can be defined as . In addition, the dc gain , , , and are ideally equal to unity and can be expressed as , , , and , where , , and are the voltage tracking errors, and is the current tracking error in addition to, , , and . Taking into account the nonidealities, the denominator of the transfer functions of Figure 1 becomes
The nonideal resonance angular frequency and quality factor *Q* are obtained by

A sensitivity study forms an important index of the performance of any active network. The formal definition of sensitivity is , where *F* represents one of , and represents any of the elements (, ) or the active parameters (, , , ). Based on the sensitivity expression, the active and passive sensitivities of the proposed circuit shown in Figure 1 are given as
Hence, the filter parameter sensitivities are low and not larger than unity in absolute value.

#### 4. Simulation Results

The device model parameters used for the HSPICE simulations are TSMC 0.35 m CMOS 2P4M process and MATLAB for the theoretical part to compare the results. The CMOS implementation of the differential difference voltage current conveyor is shown in Figure 2 [4]. The NMOS and PMOS transistor aspect ratios are given by m/0.5 m and m/0.5 m, respectively. The supply voltages are V, and the biasing voltages of and are 0.1 V and 0.8 V, respectively. The proposed circuit was designed for MHz and by choosing kΩ and pF. Figure 3 shows the simulated results amplitudes for HP, LP, and two BP filter responses of Figure 1. The total power dissipation is found to be 0.52 mW. As can be seen, there is a close agreement between theory and simulation.

The noise behavior of the filter was simulated using the INOISE and ONOISE statements of frequency responses of the BP response at output terminal. Figure 4 shows the simulated amplitude-frequency responses for the BP filter with INOISE- and ONOISE-designed kΩ and pF. The total equivalent input and output noise voltages are 13.8 mV and 0.48 mV, respectively.

To test the input dynamic range of the filter, the simulation has been repeated for a sinusoidal input signal at MH_{Z}. Figure 5 shows the input dynamic range of the inverting BP response at output terminal with kΩ and pF, which extends up to amplitude of 0.7 V (peak to peak) without signification distortion. The dependence of the output harmonic distortion of BP filter on input voltage amplitude is illustrated in Figure 6. From Figure 6, we can see that the harmonic distortion rapidly increases if the input signal is increased beyond 0.7 V for the chosen DDCC implementation.

#### 5. Conclusion

In this paper, the author also proposes a new high-input impedance voltage-mode multifunction biquadratic filter. This circuit offers several advantages, such as no requirements for component-matching conditions, the use of only grounded passive components, high-input impedance, and low active and passive sensitivity performances. The proposed circuit has the same advantages reported by [3] which is using two minus-type DDCCs, two grounded capacitors, and two grounded resistors. Moreover, the proposed circuit is simpler in configuration than the old circuit, since the use of only plus-type of DDCCs is simpler than the use of the minus-type of DDCCs. In addition to inverting highpass, inverting bandpass, and non-inverting lowpass filter responses, the proposed circuit can also realize non-inverting bandpass filter response.

#### Acknowledgments

The author would like to thank National Chip Implementation Center (CIC) for technical support. The work was sponsored by NSC-98-2221-E-131-027.

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