Metal-Insulator-Semiconductor Field-Effect TransistorsView this Special Issue
Research Article | Open Access
Ming-Kwei Lee, Chih-Feng Yen, "Comprehension of Postmetallization Annealed MOCVD- on Treated III-V Semiconductors", Active and Passive Electronic Components, vol. 2012, Article ID 148705, 10 pages, 2012. https://doi.org/10.1155/2012/148705
Comprehension of Postmetallization Annealed MOCVD- on Treated III-V Semiconductors
The electrical characteristics of TiO2 films grown on III-V semiconductors (e.g., p-type InP and GaAs) by metal-organic chemical vapor deposition were studied. With (NH4)2S treatment, the electrical characteristics of MOS capacitors are improved due to the reduction of native oxides. The electrical characteristics can be further improved by the postmetallization annealing, which causes hydrogen atomic ion to passivate defects and the grain boundary of polycrystalline TiO2 films. For postmetallization annealed TiO2 on (NH4)2S treated InP MOS, the leakage current densities can reach and A/cm2 at MV/cm, respectively. The dielectric constant and effective oxide charges are 46 and C/cm2, respectively. The interface state density is cm−2 eV−1 at the energy of 0.67 eV from the edge of valence band. For postmetallization annealed TiO2 on (NH4)2S treated GaAs MOS, The leakage current densities can reach and at MV/cm, respectively. The dielectric constant and effective oxide charges are 66 and C/cm2, respectively. The interface state density is cm−2 eV−1 at the energy of 0.7 eV from the edge of valence band.
Due to its high electron mobility and direct energy band gap compared with Si, much attention has been focused on III-V compound semiconductor (e.g., InP and GaAs) high-speed devices. Usually, the metal-semiconductor field-effect transistor (MESFET) is one of III-V main high-speed devices due to the lack of high quality of oxide on it. The main disadvantage of MESFET is the high gate currents of Schottky contact under the positive bias of several tenths of a volt, which severely limits the maximum drain currents, the lower noise margin, and the less flexibility of the circuit design. Metal-oxide-semiconductor field-effect transistor (MOSFET) can alleviate these problems. Many high-k dielectrics, such as , TiO2 , , HfAlO , and HfO2 , are currently being explored on III-V substrates. For high-k dielectrics, the same gate capacitance per unit area can be realized using a much thicker gate materials and results in less tunneling leakage current. Of various high-k materials, TiO2 has generated much interest as it offers a large dielectric constant (k value 4–86)  and a higher transconductance of MOSFET is expected .
High dielectric constant polycrystalline films were prepared by metal-organic chemical vapor deposition (MOCVD) , sol-gel , and sputtering . MOCVD- was used in this study because of its simple process and higher quality. Usually, the leakage current of MOCVD- on III-V is high from the high interface state [11, 12] and the polycrystalline grain boundary [13, 14]. From previous studies [13, 14], the high from native oxides on III-V surface can be removed by treatment. It can also passivate the surface dangling bonds of III-V surface and prevent it from oxidizing.
The low temperature postmetallization annealing (PMA) is an effective process to reduce the oxide charge density and the in /Si metal-oxide-semiconductor (MOS) technology [15, 16]. The mechanism of PMA process is from the reaction between the aluminum contact and hydroxyl groups existed on films surface resulting in hydrogen atomic ions diffusing through the oxide and passivate the oxide traps [15–17]. From our previous study , the PMA was used to reduce the leakage current from the defects and grain boundary of polycrystalline films grown on silicon. Both treatments also show the same function on high-k/III-V. In this study, we try to review the improvement of electrical characteristics of /InP and /GaAs by the combination of and PMA treatments (PMA-/S-InP (GaAs)).
Zn doped p-type (100) InP and GaAs with carrier concentration of and were used as the substrates. These substrates were degreased in solvent and followed by chemical etching in a solution (H2SO4 : H2O2 : H2O = 5 : 1 : 1) for 3 min and then rinsed in deionized water. After cleaning, substrates were immediately dipped into solution for 40 min at 50°C and then blow-dried with nitrogen gas. After treatment, substrates were thermally treated at 220°C in a nitrogen atmosphere for 10 min in order to desorb the excess of weakly bonded sulfur and were ready for MOCVD- growth.
Polycrystalline thin films were grown on substrates by a horizontal cold-wall MOCVD system. Tetraisopropoxytitanium (Ti) was used as a Ti precursor and kept at 24°C. Nitrogen was used as the carrier gas and its flow rate was 10 sccm. Nitrous oxide gas was used as an oxidizing agent and its flow rate was 100 sccm. Molybdenum was used as the oxidation-resist susceptor. The reactor pressure was kept at 5 Torr during the growth. The growth temperature was kept at 400°C for 5 min. The chemical reaction steps during the deposition of on substrate in MOCVD system are as follows.
In PMA procedure, aluminum (Al) was deposited upon the films as the cap layer. Then, these films were annealed in nitrogen ambient for 10 min at the temperature of 300, 350, and 400°C, respectively. Finally, the Al was etched away with an etching solution (H3PO4 : HNO3 : CH3COOH : H2O = 73 : 4: 3.5 : 19.5).
A metal-oxide-semiconductor (MOS) structure was used to examine the electrical characteristics. In-Zn alloy (In 90% and Zn 10%) was evaporated on the III-V back side for ohmic contact and then thermally annealed at 400°C for 3 min in nitrogen atmosphere. The ohmic contact was confirmed by the current-voltage characteristics. Then, Al was evaporated on films as the top contact with the area of . Scanning electron microscopy (SEM) was used to examine the thickness of film. A HP4145B semiconductor-parameter analyzer was used for current-voltage characterization. A high frequency (1 MHz) HP4280A capacitance-voltage meter was used for characterization scanned from accumulation region to inversion region. The DC bias was swept by 1/30 V/sec. The was derived from curves by Terman method , which can provide a good evaluation  of the higher than with 10% error [21, 22].
3. Results and Discussion
The SEM cross section of /S-InP is shown in Figure 1(a) and the thickness of film is 59 nm. The SEM picture shows that there is an interfacial layer. From the image of high-resolution transmission electron micros-copy (HRTEM) shown in the inset in Figure 1(a), the interfacial layer is 2.5 nm. It is from the interdiffusion between and InP examined by SIMS depth profile shown in Figure 2(a). The SEM cross section of /S-GaAs is shown in Figure 1(b) and the thickness of film is 62 nm. The SEM picture also shows an interfacial layer. The mechanism is the same as /S-InP and examined by the SIMS depth profile shown in Figure 3(a). It indicates that a low temperature growth process is essential for decreasing the interfacial layer for ultrathin film. Atomic layer deposition (ALD) may be the candidate.
The X-ray photoelectron spectroscopy (XPS) core level spectra of In of InP without and with treatments are shown in Figures 4(a) and 4(b), respectively. For InP without treatment, the strong In XPS peak at 444.7 eV can be attributed to In-P bond  and the peak at 443.7 eV is from In-O bond . For InP with treatment, a new strong peak at 444.9 eV  and a small satellite peak at 443.9 eV are from In-S and In-O, respectively. The strong In-S bond shows that In empty dangling bond is passivated by S. The much weaker In-O peak indicates that native oxides are significantly reduced after treatment. It suggests the treatment can not completely remove native oxides on III-V semiconductors. It needs a further investigation.
In order to double check the function of passivation, the photoluminescence (PL) spectra of GaAs and S-GaAs are shown in the inset of Figure 5. The lower PL intensity for GaAs without treatment shows a high surface recombination velocity [26, 27]. The PL intensity is much improved for GaAs with treatment. It indicates that the passivation is an effective way to reduce the surface recombination velocity . It supports that treatment can remove native oxides and prevent III-V surface from oxidizing.
The leakage current densities of TiO2 film deposited on InP substrate with and without treatments are shown in Figure 6. It also shows the leakage current densities of PMA-/S-InP treated at the PMA temperatures of 300, 350, and 400°C. The leakage current densities of /InP are 0.1 and at ±1 MV/cm as shown in Figure 6(a). The high leakage currents are mainly from the high density of defects in the grain boundary of polycrystalline film [11, 12] and the high interface states at /InP interface due to InP native oxide [13, 14]. For /S-InP as shown in Figure 6(b), the leakage current densities are 4.56 × 10−6 and 0.16 A/cm2 at ±1 MV/cm, respectively. The leakage currents are mainly from and grain boundary of film. After treatment, higher quality film can be deposited on reconstructed InP surface . The leakage current is much improved under positive bias from the reduction of . However, only one order improvement of the leakage current under negative bias is from grain boundary.
The leakage current density can be further improved by PMA treatment as shown in Figures 6(c)–6(e). The lowest leakage current densities of PMA- can reach and at ±1 MV/cm at the PMA treatment of 350°C as shown in Figure 6(d). After PMA process, the thickness of the interfacial layer does not change and is examined from SIMS depth profiles as shown in Figures 2(a) and 2(b). Therefore, the improvement of leakage current is not from the increase of interfacial layer thickness after PMA. Figure 2(b) shows that H atoms are uniformly distributed in the whole TiO2 film due to H fast diffusion after PMA treatment. It would diffuse along and passivate the grain boundary. At the PMA treatment of 300°C, the leakage current densities are and at ±1 MV/cm as shown in Figure 6(c). The slight increase of leakage current compared with Figure 6(d) could be from the lower PMA temperature, which cannot provide sufficient energy for H atoms for passivation. For the PMA temperature at 400°C as shown in Figure 6(e), the leakage currents are higher than that of 300 and 350°C. It is that the higher PMA temperature would destroy the H passivation and is examined by characteristics.
For on GaAs substrate with and without treatments, the leakage current densities are shown in Figure 7. It also exhibits the leakage current densities of PMA-/S-GaAs treated at the PMA temperatures of 300, 350, and 400°C. The leakage current densities of /GaAs without treatment are and at ±1 MV/cm as shown in Figure 7(a). For /S-GaAs as shown in Figure 7(b), the leakage current densities are and at ±1 MV/cm, respectively. The leakage current density can be further improved by PMA treatment as shown in Figures 7(c)–7(e). The leakage current densities are and at ±1 MV/cm at the PMA treatment of 300°C as shown in Figure 7(c). The lowest leakage current densities of PMA-/S-GaAs can reach and at ±1 MV/cm at the PMA treatment of 350°C as shown in Figure 7(d). For the PMA temperature at 400°C, the leakage currents are and at ±1 MV/cm as shown in Figure 3(e), which are higher than that of 300 and 350°C. The mechanisms are similar to InP as mentioned in the previous paragraph.
The characteristics of /InP, /S-InP, and PMA-/S-InP are shown in Figure 8. The characteristics of /InP show a flat curve as in Figure 8(a). It is from the high density of interface states due to the existence of native oxides on InP surface, which causes the pinning of the surface Fermi level near the middle of the band gap . Figure 8(b) shows the characteristics of /S-InP. The capacitance in the accumulation region is high due to the improved interface quality. The capacitance decay at higher negative bias is due to the high leakage current, which comes from the defects and the grain boundary of polycrystalline film. Sharp curves PMA-/S-InP can be obtained after PMA treatments at 300, 350, and 400°C as shown in Figures 8(c)–8(e), respectively. The ideal C-V curve is also shown in the figure as a reference. It is derived from the neglect of the effective oxide charges and the interface states, but the work function difference of metal (Al) and semiconductor (InP) is taken into account. The optimized PMA temperature is 350°C as shown in Figure 8(d), in which the stretch-out phenomenon and the flat-band voltage shift are minimized. The dielectric constants and effective oxide charges of PMA-/S-InP films as functions of PMA temperature are shown in Figures 9(a) and 9(b), respectively. The dielectric constant increases with the PMA temperature due to the improvements of interface and film qualities. But the value decreases at PMA temperature high than 350°C. The higher PMA temperature will break the H bonds and lose the passivation function [30, 31] and results in the increase of leakage current as shown in Figure 6. The dielectric constant and the effective oxide charges can reach 46 and at the PMA temperature of 350°C. The thickness of film is 59 nm. The interfacial layer is very thin, which has minor effect during the extraction of dielectric constants.
Moreover, the hysteresis loops as a function of PMA temperature are shown in Figure 10. The hysteresis loop of /S-InP without PMA treatment is counterclockwise as shown in Figure 10(a), which is from high density of oxide trapped charges [18, 20] in /S-InP film without H passivation. The hysteresis loops of PMA-/S-InP film are clockwise at 300 and 350°C as shown in Figures 10(b) and 10(c). The mobile ions are responsible for the clockwise hysteresis loop due to the decrease of oxide trapped charges from film quality improvement. The hysteresis loop changes back to counterclockwise at 400°C as shown in Figure 10(d). It is dominated by oxide trapped charges due to the break of H bonds and hence the loss of the passivation function at higher PMA temperature [30, 31]. The sum of oxide trapped density and mobile ion density can be derived from the difference of flat-band voltage of the hysteresis loops measured at high frequency . The formula is as follows: where is the oxide capacitance, is the contact area , and q is magnitude of an electron charge. In measurement, the bias scans first from accumulation region to inversion region (forward scan) and then back to accumulation region (backward scan). is defined as the difference of VFB between the forward scan and the backward scan. So, the polarity of oxide trapped charge is negative and that of mobile ion charge is positive. The of PMA-/S-InP as a function of PMA temperature is shown in Figure 11. The lowest is at the PMA temperature of 350°C.
The characteristics of /GaAs, /S-GaAs and PMA-/S-GaAs are shown in Figure 12. The characteristics of /GaAs show a stretch-out phenomenon under negative bias as shown in Figure 12(a). It is from the high due to the existence of native oxides on GaAs surface. The breakdown at higher negative bias is from the higher leakage current resulted in the grain boundary of polycrystalline structure. Figure 12(b) shows the characteristics of /S-GaAs. The capacitance in the accumulation region is high due to the improved interface quality and the capacitance decay at higher negative bias is due to the high leakage current. Sharp curves PMA-/S-GaAs can be obtained after PMA treatments at 300, 350, and 400°C as shown in Figures 12(c), 12(d), and 12(e), respectively. The ideal C-V curve is also shown in the figure as a reference. The work function difference of metal (Al) and semiconductor (GaAs) is taken into account. The optimized PMA temperature is 350°C as shown in Figure 12(d), in which the stretch-out phenomenon and the flat-band voltage shift are minimized. The dielectric constants and effective oxide charges of PMA-/S-GaAs films as functions of PMA temperature are shown in Figures 13(a) and 13(b), respectively. The dielectric constant and the effective oxide charges can reach 66 and at the PMA temperature of 350°C.
Moreover, the hysteresis loops as a function of PMA temperature are shown in Figure 14. The hysteresis loop of /S-GaAs without PMA treatment is counterclockwise as shown in Figure 14(a). The hysteresis loops of PMA-/S-GaAs film are clockwise at 300 and 350°C as shown in Figures 14(b) and 14(c). The hysteresis loop changes back to counterclockwise at 400°C as shown in Figure 14(d). These behaviors are similar to InP. The of PMA-/S-GaAs as a function of PMA temperature is shown in Figure 15. The lowest is at the PMA temperature of 350°C.
The of /S-InP and PMA-/S-InP at different PMA temperatures is shown in Figure 16. The lowest is at the energy of 0.67 eV from the edge of valence band. The of /S-GaAs and PMA-/S-GaAs at different PMA temperatures is shown in Figure 17. The lowest is at the energy of 0.7 eV from the edge of valence band. The PMA temperature of two samples was fixed at 350°C.
Table 1 shows the comparisons of electrical characteristics by PMA(350°C)-/InP and PMA(350°C)-/GaAs. Form this table we can clearly recognize that electrical characteristics of GaAs are superior to InP. It would be from the fact that the outgas is more serious than that of As due to the higher vapor pressure. It slightly degrades the interface and film quality of InP MOS structure. PMA and (NH4)2S treatments highly improve the electrical properties of III-V MOS structures, and dielectric films prepared by lower growth temperature can give more benefits, such as liquid phase deposition and ALD.
films grown on III-V semiconductors with treatments were investigated. With treatment, the interface quality of /III-V is much improved. PMA treatment further improves the electrical characteristics. The electrical characteristics of GaAs MOS is better than that of InP, which is from the innate character of higher vapor pressure. There is an interface layer from the inter-diffusion between and substrate. Dielectric films prepared by lower growth temperature for III-V MOS structures can give more benefits.
The authors would like to thank the National Science Council, Taiwan, for their support under Contract no. 98-2221-E110-073-MY3.
- H. C. Lin, P. D. Ye, and G. D. Wilk, “Leakage current and breakdown electric-field studies on ultrathin atomic-layer-deposited Al2O3 on GaAs,” Applied Physics Letters, vol. 87, Article ID 182904, 3 pages, 2005.
- M. K. Lee, C. F. Yen, and J. J. Huang, “Electrical characteristics of liquid-phase-deposited TiO2 films on GaAs substrate with (NH4)2 Sx treatment,” Journal of the Electrochemical Society, vol. 153, no. 5, pp. F77–F80, 2006.
- C. C. Cheng, C. H. Chien, G. L. Luo et al., “Improved electrical properties of Gd2 O3 GaAs capacitor with modified wet-chemical clean and sulfidization procedures,” Journal of the Electrochemical Society, vol. 155, no. 3, pp. G56–G60, 2008.
- H. C. Chin, M. Zhu, G. S. Samudra, and Y. C. Yeo, “N-xhannel GaAs MOSFET with TaNHfAlO gate stack formed using in situ vacuum anneal and silane passivation,” Journal of the Electrochemical Society, vol. 155, no. 7, pp. H464–H468, 2008.
- G. He, L. D. Zhang, M. Liu, and Z. Q. Sun, “HfO2-GaAs metal-oxide-semiconductor capacitor using dimethylaluminumhydride-derived aluminum oxynitride interfacial passivation layer,” Applied Physics Letters, vol. 97, Article ID 062908, 3 pages, 2010.
- R. Paily, A. DasGupta, N. DasGupta et al., “Pulsed laser deposition of TiO2 for MOS gate dielectric,” Applied Surface Science, vol. 187, no. 3-4, pp. 297–304, 2002.
- S. M. Sze, Physics of Semiconductor Devices, chapter 8, John Wiley & Sons, New York, NY, USA, 2nd edition, 1981.
- S. A. Campbell, D. C. Gilmer, X. C. Wang et al., “MOSFET transistors fabricated with high permitivity TiO2 dielectrics,” IEEE Transactions on Electron Devices, vol. 44, no. 1, pp. 104–109, 1997.
- R. S. . Sonawane, S. G. Hegde, and M. K. Dongare, “Preparation of titanium(IV) oxide thin film photocatalyst by sol-gel dip coating,” Materials Chemistry and Physics, vol. 77, pp. 744–750, 2003.
- P. Zeman and S. Takabayashi, “Effect of total and oxygen partial pressures on structure of photocatalytic TiO2 films sputtered on unheated substrate,” Surface and Coatings Technology, vol. 153, no. 1, pp. 93–99, 2002.
- D. M. Shang and W. Y. Ching, “Electronic and optical properties of three phases of titanium dioxide: rutile, anatase, and brookite,” Physical Review B, vol. 51, pp. 13023–13032, 1995.
- D. C. Gilmer, X. C. Wang, M. T. Hsieh, H. S. Kim, W. L. Glasfelter, and J. Yan, “MOSFET transistors fabricated with high permitivity TiO2 dielectrics,” IEEE Transactions on Electron Devices, vol. 44, pp. 104–109, 1997.
- R. Lyer, R. R. Chang, A. Dubey, and D. L. Lile, “The effect of phosphorous and sulfur treatment on the surface properties of InP,” Journal of Vacuum Science & Technology B, vol. 6, p. 1174, 1988.
- R. W. M. . Kwok, L. J. Huang, W. M. Lau et al., “X-ray absorption near edge structures of sulfur on gas-phase polysulfide treated InP surfaces and at SiNx/InP interfaces,” Journal of Vacuum Science & Technology A, vol. 12, p. 2701, 1994.
- E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, chapter 15, John Wiley & Sons, New York, NY, USA, 2003.
- E. K. Badih and J. B. Richard, Introduction to VLSI Silicon Device Physics, Technology and Characterization, Kluwer Academic, 1986.
- M. L . Reed and J. D. Plummer, “Chemistry of Si-SiO2 interface trap annealing,” Journal of Applied Physics, vol. 63, p. 5776, 1988.
- M. K. Lee, J. J. Huang, and Y. H. Hung, “Variation of electrical characteristics of metallorganic chemical vapor deposited TiO2 films by postmetallization annealing,” Journal of the Electrochemical Society, vol. 152, no. 11, pp. F190–F193, 2005.
- L. M. Terman, “An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes,” Solid State Electronics, vol. 5, no. 5, pp. 285–299, 1962.
- D. K. Schroder, Semiconductor Material and Device Characterization, chapter 5 and 6, John Wiley & Sons, New York, NY, USA, 1998.
- E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, chapter 8 and 9, John Wiley & Sons, New York, NY, USA, 2003.
- C. T. Sah, A. B. Tole, and R. F. Pierret, “Error analysis of surface state density determination using the MOS capacitance method,” Solid State Electronics, vol. 12, no. 9, pp. 689–709, 1969.
- Y. Tao, A. Yelon, E. Sacher, Z. H. Lu, and M. J. Graham, “S-passivated InP (100)-(1×1) surface prepared by a wet chemical process,” Applied Physics Letters, vol. 60, p. 2669, 1992.
- H. P. Song, A. L. Yang, H. Y. Wei et al., “Determination of wurtzite InN/cubic In2O3 heterojunction band offset by x-ray photoelectron spectroscopy,” Applied Physics Letters, vol. 94, Article ID 222114, 3 pages, 2009.
- T. K. Oh, C. H. Baek, and B. K. Kang, “Surface treatment for enhancing current gain of AlGaAs/GaAs heterojunction bipolar transistor,” Solid-State Electronics, vol. 48, no. 9, pp. 1549–1553, 2004.
- M. Passlack, M. Hong, J. P. Mannaerts, J. R. Kwo, and L. W. Tu, “Recombination velocity at oxide-GaAs interfaces fabricated by in situ molecular beam epitaxy,” Applied Physics Letters, vol. 68, no. 25, pp. 3605–3607, 1996.
- M. Passlack, M. Hong, J. P. Mannaerts, R. L. Opila, and F. Ren, “Thermodynamic and photochemical stability of low interface state density Ga2O3-GaAs structures fabricated by in situ molecular beam epitaxy,” Applied Physics Letters, vol. 69, no. 3, pp. 302–304, 1996.
- R. S. . Besser and C. R. Helms, “Comparison of surface properties of sodium sulfide and ammonium sulfide passivation of GaAs,” Journal of Applied Physics, vol. 65, p. 4306, 1989.
- Y. Ishikawa, T. Fujui, and H. Hasegawa, “Kink defects and Fermi level pinning on (2×4) reconstructed molecular beam epitaxially grown surfaces of GaAs and InP studied by ultrahigh-vacuum scanning tunneling microscopy and x-ray photoelectron spectroscopy,” Journal of Vacuum Science & Technology B, vol. 15, pp. 1163–1172, 1997.
- C. K. Jung, D. C. Lim, H. G. Jee et al., “Hydrogenated amorphous and crystalline SiC thin films grown by RF-PECVD and thermal MOCVD; comparative study of structural and optical properties,” Surface and Coatings Technology, vol. 171, pp. 46–50, 2003.
- H. D. Fuchs, M. Stutzman, M. S. Brandt et al., “Porous silicon and siloxene: vibrational and structural properties,” Physical Review B, vol. 48, pp. 8172–8189, 1993.
Copyright © 2012 Ming-Kwei Lee and Chih-Feng Yen. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.