Active and Passive Electronic Components

Volume 2016 (2016), Article ID 8351406, 10 pages

http://dx.doi.org/10.1155/2016/8351406

## Energy-Aware Low-Power CMOS LNA with Process-Variations Management

^{1}Centro de Investigaciones en Microelectrónica (CIME-CUJAE), Antigua Carretera de Vento, km 8, Capdevila, Boyeros, 10800 Havana, Cuba^{2}Universidade Federal de Itajubá (UNIFEI), Avenida BPS 1303, Bairro Pinheirinho, Caixa Postal 50, 37500 903 Itajubá, MG, Brazil^{3}Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Parque Científico y Tecnológico Cartuja, Calle Américo Vespucio s/n, 41092 Sevilla, Spain

Received 22 November 2015; Revised 18 January 2016; Accepted 20 January 2016

Academic Editor: Ching Liang Dai

Copyright © 2016 Jorge Luis González et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

A reconfigurable low-noise amplifier (LNA) with digitally controllable gain and power consumption is presented. This architecture allows increasing power consumption only when required, that is, to improve LNA’s radiofrequency performance at extreme communication-channel conditions and/or to counteract the effect of process, voltage, and temperature variations. The proposed design leads to significant power saving when a relaxed operation is acceptable. The LNA is implemented in a 130 nm 1.2 V CMOS technology for a 2.4 GHz IEEE-802.15.4 application. Simulated LNA performance (taking into account the worst cases under process variations) is comparable to recently published works.

#### 1. Introduction

A system with multiple operation modes, able to adapt its performance dynamically depending on working conditions, can be implemented using reconfigurable circuits. Modes with relaxed requirements can be designed to operate at lower biasing current and/or voltage, leading to an overall decrease in power consumption compared to conventional fixed circuits. This power-saving approach has been applied in the following two scenarios: (1) to mitigate the effects of process variations (improving yield and reliability) [1–3] and (2) to implement wireless-receiver blocks which adjust their power consumption depending on communication-channel conditions (energy-aware receivers) [4–7]. Combining both features in an integrated receiver circuit shows up as a very attractive design goal, due to the growing demand and mass production of low-power wireless devices. However, such a solution has not been already reported.

In the receiver context, especially in fully integrated implementation scenarios, the low-noise amplifier (LNA) is a key block that determines the overall system performance [8]. It has to offer, simultaneously, good input matching, low-noise contribution, high linearity, and high reverse isolation, constrained by power consumption. In addition, its gain is crucial and represents a trade-off between receiver’s noise and linearity performances [8, 9]. In this sense, adjusting RF parameters of the LNA, especially gain, by controlling the biasing of amplifying-stage transistors, has been used to allow power-consumption saving under relaxed communication-channel conditions [6, 7, 10].

On the other hand, adaptability has been also used to mitigate the effects of process variations on CMOS-LNAs [3, 11–15]. The proposal presented by González et al. [3] shows the potentials of an adaptable LNA to save power when its behavior under process variations remains close to the typical-case performance. However, the reported solutions focus on calibrating fixed-gain LNAs; thus, they do not exploit the advantages of variable-gain schemes.

This work presents a reconfigurable LNA capable of adjusting its power consumption taking into account communication-channel conditions and the effects of process, supply-voltage, and temperature variations. This energy-aware LNA uses architecture with digitally controllable gain and power consumption. The proposed power-saving strategy is corroborated by implementing a 130 nm 1.2 V CMOS LNA for a 2.4 GHz IEEE-802.15.4 application. LNA behavior under process variations is analyzed via Monte Carlo simulations, the results of which are used to evaluate the corresponding receiver performance.

This paper is organized as follows. Section 2 summarizes the main equations that support the ideas followed in this work, from a system-level point of view. Section 3 describes the reconfigurable architecture and the proposed power-saving strategy as a function of communication-channel conditions and the effects of process variations. Section 4 presents the main implementation details and discusses simulation results, including the comparison with other LNAs for IEEE-802.15.4 receivers. Finally, conclusions are given in Section 5.

#### 2. A System-Level Overview

The working principle of an energy-aware receiver relies on the fact that noise figure (NF) and linearity requirements depend on the received input-signal level. This can be understood by examining the following expressions [16]:In the above equations, is the noise figure, is the input-signal power, is the Boltzmann constant, is the absolute temperature, is the channel bandwidth, is the minimum signal-to-noise ratio required by the application (including some design margin which accounts for losses that are not certainly determined at system-level design time), is the input-referred third-order intermodulation intercept point, and is the power of interferer signals. All the magnitude values are expressed in logarithmic units (dB or dBm), with the exception of product. Equation (3) derives from the general assumption that considers the 1 dB compression point () as the upper limit of input power [17] and from the approximate relationship dB [8], in order to use as the only linearity measurement.

It can be seen from (1) that NF can be relaxed as input-signal power increases. On the other hand, has two critical values: one required to detect a weak desired signal in the presence of interferers (see (2)) and the other required to drive the maximum signal level (see (3)). However, linearity requirement of the receiver can be lessened at intermediate signal levels. This can be exploited for saving energy by implementing a reconfigurable circuit with multiple operation modes (i.e., with different values of NF and ), taking into account the fact that more relaxed NF and can be achieved with lower power consumption [19]. The aforementioned approach contrasts with the use of traditional circuits, which must be designed to work at worst-case conditions, thus requiring higher and fixed power consumption.

##### 2.1. LNA in the Receiver Context

Receiver parameters () can be related to those of the LNA (, and ) and the other building blocks (, , where subscript “” stands for “following stages,” i.e., from mixer input to output) using cascaded-stages equations (4) [8]. Hence,In the above equations, is the noise factor, such as , while gain and IIP_{3} are expressed in “times” (W/W) and W (or mW), respectively.

Controlling LNA parameters, particularly gain, allows adjusting the noise figure and linearity of the receiver. The LNA should provide high gain and low-noise figure to guarantee the required noise figure of the receiver for detecting the minimum input-signal level. However, LNA gain can be reduced as the NF of the receiver can be relaxed, when receiving higher input-signal levels. LNA gain reduction also allows lowering the linearity of the LNA and the subsequent stages, without affecting the receiver linearity required to drive large input-signal power. Therefore, it is convenient to design adaptable LNAs, with the capability of switching between high and low gain modes [20, 21].

When needed, gain can be lowered by reducing the transconductance of amplifying-stage transistors, which in fact allows for power-consumption saving [6, 7, 10]. However, changing the DC operation point affects other RF parameters, thus limiting the gain variation rate. Therefore, the inclusion of extra DC-invariant gain-controlling methods could be useful, for example, to compensate for linearity degradation, as it is shown here.

#### 3. The Proposed Energy-Aware LNA

Based on the widely used inductively degenerated common-source topology, Figure 1 shows the proposed reconfigurable LNA implementing the above ideas. This is an improved proposal with respect to that presented at [3], where only worst-case process variations were dealt with.