Comprehensive Optimization of Dual Threshold Independent-Gate FinFET and SRAM Cells

<table class="figure-group"><tr class="fig-image" id="a"><td><object data="https://static.hindawi.com/articles/apec/volume-2018/4512924/figures/4512924.fig.001a.svgz" name="4512924.fig.001a" type="image/svg+xml"></object></td></tr><tr class="fig-caption"><td><b>(a) </b>SG FinFET</td></tr><tr class="fig-image" id="b"><td><object data="https://static.hindawi.com/articles/apec/volume-2018/4512924/figures/4512924.fig.001b.svgz" name="4512924.fig.001b" type="image/svg+xml"></object></td></tr><tr class="fig-caption"><td><b>(b) </b>IG FinFET</td></tr></table>

<div>3D structure of FinFET: (a) SG FinFET and (b) IG FinFET.</div>

Active and Passive Electronic Components

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Figure 1

Figure 1: Comprehensive Optimization of Dual Threshold Independent-Gate FinFET and SRAM Cells 