Research Article
An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study
Table 3
Complexity study of proposed architectures.
| Proposed design | XOR gate | Cell used | Covered area in | Cell area in | Area usage (%) | Latency |
| Full adder | 1 | 28 | 0.02 | 0.0090 | 45.00 | 2 |
| Full subtractor | 1 | 27 | 0.03 | 0.0087 | 29.00 | 2 |
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