Active and Passive Electronic Components http://www.hindawi.com The latest articles from Hindawi Publishing Corporation © 2017 , Hindawi Publishing Corporation . All rights reserved. A New Capacitor-Less Buck DC-DC Converter for LED Applications Tue, 17 Jan 2017 06:00:28 +0000 http://www.hindawi.com/journals/apec/2017/2365848/ In this paper, a new capacitor-less DC-DC converter is proposed to be used as a light emitting diode (LED) driver. The design is based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such configuration can be utilized to enlarge the total internal capacitance and hence minimize the output ripple. Also, the switching frequency is selected such that a minimum ripple appears at the output. The functionality of the proposed design is confirmed experimentally and the efficiency of the driver is 85% at full load. Munir Al-Absi, Zainulabideen Khalifa, and Alaa Hussein Copyright © 2017 Munir Al-Absi et al. All rights reserved. Simultaneous Suppression of IMD3 and IMD5 in Space TWT by IMD3 and 2HD Signal Injection Tue, 10 Jan 2017 00:00:00 +0000 http://www.hindawi.com/journals/apec/2017/4721048/ This paper presents a signal injection technology showing significant reductions in both 3rd-order and 5th-order intermodulation distortions (IMD3 and IMD5) in space traveling wave tube (STWT). By applying the IMD3 to the IMD5 ratio (TFR) as measures of location, the simultaneous suppressions of IMD3 and IMD5 in TWT are achieved by second harmonic distortion (2HD) and IMD3 injection. According to the research on theoretical analysis and computer simulation, the optimum amplitude and phase parameters of the injected signal for maximum simultaneous suppressions are obtained. Then an experiment system is established based on vector network analyzer, optimum TFR are 2.1 dB and 12.5 dB, respectively, by second harmonic and IM3 injection, and the output powers of IMD3 and IMD5 were decreased. TFR with IMD3 injection is smaller than that with second harmonic injection in STWT, and the experiment system is more straightforward and easy to operate. Thus, the IMD3 injection performs better than that of second harmonic injection to suppress IMD5s for the narrow-band STWT. Dongming Zhao, Huijuan Liu, Kewen Xia, Shi Li, and Xiaoxu Shi Copyright © 2017 Dongming Zhao et al. All rights reserved. Design of a Narrow Bandwidth Bandpass Filter Using Compact Spiral Resonator with Chirality Mon, 26 Dec 2016 06:28:40 +0000 http://www.hindawi.com/journals/apec/2016/7074392/ In this article, a compact narrow-bandpass filter with high selectivity and improved rejection level is presented. For miniaturization, a pair of double negative (DNG) cells consisting of quasi-planar chiral resonators are cascaded and electrically loaded to a microstrip transmission line; short ended stubs are introduced to expand upper rejection band. The structure is analyzed using equivalent circuit models and simulated based on EM simulation software. For validation, the proposed filter is fabricated and measured. The measured results are in good agreement with the simulated ones. By comparing to other filters in the references, it is shown that the proposed filter has the advantage of skirt selectivity and compact size, so it can be integrated more conveniently in modern wireless communication systems and microwave planar circuits. Weiping Li, Zongxi Tang, and Xin Cao Copyright © 2016 Weiping Li et al. All rights reserved. Impact of Band Nonparabolicity on Threshold Voltage of Nanoscale SOI MOSFET Sun, 25 Dec 2016 09:42:11 +0000 http://www.hindawi.com/journals/apec/2016/6068171/ This paper reconsiders the mathematical formulation of the conventional nonparabolic band model and proposes a model of the effective mass of conduction band electrons including the nonparabolicity of the conduction band. It is demonstrated that this model produces realistic results for a sub-10-nm-thick Si layer surrounded by an SiO2 layer. The major part of the discussion is focused on the low-dimensional electron system confined with insulator barriers. To examine the feasibility of our consideration, the model is applied to the threshold voltage of nanoscale SOI FinFETs and compared to prior experimental results. This paper also addresses a model of the effective mass of valence band holes assuming the nonparabolic condition. Yasuhisa Omura Copyright © 2016 Yasuhisa Omura. All rights reserved. Computer and Hardware Modeling of Periodically Forced -Van der Pol Oscillator Thu, 15 Dec 2016 14:09:49 +0000 http://www.hindawi.com/journals/apec/2016/3426713/ Numerical simulation results for the dynamics of -systems abound in the literature but their experimental results are yet to be known. This paper presents the chaotic dynamics of -Van der Pol oscillator via electronic design, simulation, and hardware implementation. The results obtained are found to be in good agreement with numerical simulation results. The condition for stability of the fixed points is also computed and the method of multiple time scale is used to investigate the dynamical behaviour of the system. Therefore, the -circuits which have rich dynamics and may have important applications in secure communications, random number generations, cryptography, and so forth have been practically implemented. A. O. Adelakun, A. N. Njah, O. I. Olusola, and S. T. Wara Copyright © 2016 A. O. Adelakun et al. All rights reserved. Semiconductors: Materials, Physics, and Devices Thu, 15 Dec 2016 10:31:07 +0000 http://www.hindawi.com/journals/apec/2016/4523960/ Jiangwei Liu, Hongyang Zhao, Jinlong Liu, Aurélien Maréchal, and Wei Wang Copyright © 2016 Jiangwei Liu et al. All rights reserved. Apodization Optimization of FBG Strain Sensor for Quasi-Distributed Sensing Measurement Applications Sun, 04 Dec 2016 11:15:16 +0000 http://www.hindawi.com/journals/apec/2016/6523046/ A novel optimized apodization of Fiber Bragg Grating Sensor (FBGS) for quasi-distributed strain sensing applications is developed and introduced in this paper. The main objective of the proposed optimization is to obtain a reflectivity level higher than 90% and a side lobe level around −40 dB, which is suitable for use in quasi-distributed strain sensing application. For this purpose, different design parameters as apodization profile, grating length, and refractive index have been investigated to enhance and optimize the FBGS design. The performance of the proposed apodization has then been compared in terms of reflectivity, side lobe level (SLL), and full width at half maximum (FWHM) with apodization profiles proposed by other authors. The optimized sensor is integrated on quasi-distributed sensing system of 8 sensors demonstrating high reliability. Wide strain sensitivity range for each channel has also been achieved in the quasi-distributed system. Results prove the efficiency of the proposed optimization which can be further implemented for any quasi-distributed sensing application. Fahd Chaoui, Otman Aghzout, Mounia Chakkour, and Mounir El Yakhloufi Copyright © 2016 Fahd Chaoui et al. All rights reserved. Noise Parameter Analysis of SiGe HBTs for Different Sizes in the Breakdown Region Wed, 12 Oct 2016 06:44:41 +0000 http://www.hindawi.com/journals/apec/2016/8506507/ Noise parameters of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) for different sizes are investigated in the breakdown region for the first time. When the emitter length of SiGe HBTs shortens, minimum noise figure at breakdown decreases. In addition, narrower emitter width also decreases noise figure of SiGe HBTs in the avalanche region. Reduction of noise performance for smaller emitter length and width of SiGe HBTs at breakdown resulted from the lower noise spectral density resulting from the breakdown mechanism. Good agreement between experimental and simulated noise performance at breakdown is achieved for different sized SiGe HBTs. The presented analysis can benefit the RF circuits operating in the breakdown region. Chie-In Lee, Yan-Ting Lin, and Wei-Cheng Lin Copyright © 2016 Chie-In Lee et al. All rights reserved. Considerations of Physical Design and Implementation for 5 MHz-100 W LLC Resonant DC-DC Converters Thu, 29 Sep 2016 07:01:15 +0000 http://www.hindawi.com/journals/apec/2016/4027406/ Recently, high power-density, high power-efficiency, and wide regulation range isolated DC-DC converters have been required. This paper presents considerations of physical design and implementation for wide regulation range MHz-level LLC resonant DC-DC converters. The circuit parameters are designed with 3–5 MHz-level switching frequency. Also, the physical parameters and the size of the planar transformer are optimized by using derived equations and finite element method (FEM) with Maxwell 3D. Some experiments are done with prototype LLC resonant DC-DC converter using gallium nitride high electron mobility transistors (GaN-HEMTs); the input voltage is 42–53 V, the reference output voltage is 12 V, the load current is 8 A, the maximum switching frequency is about 5 MHz, the total volume of the circuit is 4.1 cm3, and the power density of the prototype converter is 24.4 W/cc. Akinori Hariya, Ken Matsuura, Hiroshige Yanagi, Satoshi Tomioka, Yoichi Ishizuka, and Tamotsu Ninomiya Copyright © 2016 Akinori Hariya et al. All rights reserved. A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions Wed, 21 Sep 2016 09:18:42 +0000 http://www.hindawi.com/journals/apec/2016/9414901/ The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application. Andreas Maerz, Teresa Bertelshofer, and Mark-M. Bakran Copyright © 2016 Andreas Maerz et al. All rights reserved. Design of High-Voltage Switch-Mode Power Amplifier Based on Digital-Controlled Hybrid Multilevel Converter Tue, 20 Sep 2016 14:26:26 +0000 http://www.hindawi.com/journals/apec/2016/3982594/ Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM) technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM) and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests. Yanbin Hou, Wanrong Sun, Aifeng Ren, and Shuming Liu Copyright © 2016 Yanbin Hou et al. All rights reserved. The Design and Life Test of a Multifunction Power Amplifier for Space Application Wed, 17 Aug 2016 12:02:58 +0000 http://www.hindawi.com/journals/apec/2016/1312721/ A new multifunction power amplifier (MFPA) is designed and fabricated for the application of point-to-point K-Band backhaul TR module. A DC temperature life test was performed to model the up-limit temperature effect of the designed MFPA under space application. After 240 hours of 100°C life test, the test results illustrate that the designed MFPA has only slight power degradation at the saturation region without change of the linear gain. The general performance of the designed MFPA satisfies the requirement of the application scenario. Xiuqin Xu, Hui Xu, Yongheng Shang, Zhiyu Wang, Yang Wang, Liping Wang, Hao Luo, Zhengliang Huang, and Faxin Yu Copyright © 2016 Xiuqin Xu et al. All rights reserved. Analysis of Random Variation in Subthreshold FGMOSFET Thu, 28 Jul 2016 06:06:53 +0000 http://www.hindawi.com/journals/apec/2016/3741250/ The analysis of random variation in the performance of Floating Gate Metal Oxide Semiconductor Field Effect Transistor (FGMOSFET) which is an often cited semiconductor based electronic device, operated in the subthreshold region defined in terms of its drain current (), has been proposed in this research. is of interest because it is directly measurable and can be the basis for determining the others. All related manufacturing process induced device level random variations, their statistical correlations, and low voltage/low power operating condition have been taken into account. The analysis result has been found to be very accurate since it can fit the nanometer level SPICE BSIM4 based reference with very high accuracy. By using such result, the strategies for minimizing variation in can be found and the analysis of variation in the circuit level parameter of any subthreshold FGMOSFET based circuit can be performed. So, the result of this research has been found to be beneficial to the variability aware design of subthreshold FGMOSFET based circuit. Rawid Banchuin Copyright © 2016 Rawid Banchuin. All rights reserved. Color Calibration for Colorized Vision System with Digital Sensor and LED Array Illuminator Thu, 14 Jul 2016 06:52:26 +0000 http://www.hindawi.com/journals/apec/2016/7467165/ Color measurement by the colorized vision system is a superior method to achieve the evaluation of color objectively and continuously. However, the accuracy of color measurement is influenced by the spectral responses of digital sensor and the spectral mismatch of illumination. In this paper, two-color vision system illuminated by digital sensor and LED array, respectively, is presented. The Polynomial-Based Regression method is applied to solve the problem of color calibration in the sRGB and color spaces. By mapping the tristimulus values from RGB to sRGB color space, color difference between the estimated values and the reference values is less than . Additionally, the mapping matrix has proved a better performance in reducing the color difference, and it is introduced subsequently into the colorized vision system proposed for a better color measurement. Necessarily, the printed matter of clothes and the colored ceramic tile are chosen as the application experiment samples of our colorized vision system. As shown in the experimental data, the average color difference of images is less than . It indicates that a better performance of color measurement is obtained via the colorized vision system proposed. Zhenmin Zhu, Ruichao Song, Hui Luo, Jun Xu, and Shiming Chen Copyright © 2016 Zhenmin Zhu et al. All rights reserved. The Design and Thermal Reliability Analysis of a High-Efficiency K-Band MMIC Medium-Power Amplifier with Multiharmonic Matching Thu, 19 May 2016 12:59:35 +0000 http://www.hindawi.com/journals/apec/2016/6295405/ A new high-efficiency K-band MMIC medium-power amplifier (PA) is designed with multiharmonic matching using GaAs pHEMT process technology. It has an operation frequency centered at 26 GHz with a bandwidth of 2 GHz. A 20 dBm 1 dB-compression-point output power and 40% efficiency are achieved. A novel thermal reliability analysis method based on ICEPAK is proposed also to evaluate its thermal characteristic. The test result by using a QFI InfraScope™ infrared imaging system is compared with the simulation result. It agrees well with an accuracy within ±1°C differences, which reflects the advantages of the thermal analysis method with respect to accuracy and convenience for use. Y. Shang, H. Xu, J. Mo, Z. Wang, X. Xu, Z. Tu, X. Zhang, H. Zheng, W. Chen, and F. Yu Copyright © 2016 Y. Shang et al. All rights reserved. A Survey on the Modeling of Magnetic Tunnel Junctions for Circuit Simulation Wed, 18 May 2016 07:12:22 +0000 http://www.hindawi.com/journals/apec/2016/3858621/ Spin-transfer torque-based magnetoresistive random access memory (STT-MRAM) is a promising candidate for universal memory that may replace traditional memory forms. It is expected to provide high-speed operation, scalability, low-power dissipation, and high endurance. MRAM switching technology has evolved from the field-induced magnetic switching (FIMS) technique to the spin-transfer torque (STT) switching technique. Additionally, material technology that induces perpendicular magnetic anisotropy (PMA) facilitates low-power operation through the reduction of the switching current density. In this paper, the modeling of magnetic tunnel junctions (MTJs) is reviewed. Modeling methods and models of MTJ characteristics are classified into two groups, macromodels and behavioral models, and the most important characteristics of MTJs, the voltage-dependent MTJ resistance and the switching behavior, are compared. To represent the voltage dependency of MTJ resistance, some models are based on physical mechanisms, such as Landau-Lifshitz-Gilbert (LLG) equation or voltage-dependent conductance. Some behavioral models are constructed by adding fitting parameters or introducing new physical parameters to represent the complex switching behavior of an MTJ over a wide range of input current conditions. Other models that are not based on physical mechanisms are implemented by simply fitting to experimental data. Hyein Lim, Seungjun Lee, and Hyungsoon Shin Copyright © 2016 Hyein Lim et al. All rights reserved. Corrigendum to “Analysis of the Coupling Coefficient in Inductive Energy Transfer Systems” Tue, 10 May 2016 09:17:26 +0000 http://www.hindawi.com/journals/apec/2016/5929347/ Rafael Mendes Duarte and Gordana Klaric Felic Copyright © 2016 Rafael Mendes Duarte and Gordana Klaric Felic. All rights reserved. Design of Wide-Band Bandpass Filter Using Composite Right/Left-Handed Transmission Line Structure Mon, 11 Apr 2016 13:33:19 +0000 http://www.hindawi.com/journals/apec/2016/6532010/ A wide-band microstrip bandpass filter (BPF) based on the improved composite right/left-handed transmission line (CRLH-TL) structure is presented in this paper. Compared to the traditional CRLH-TL with via hole, the improved one is an all-planar structure, which owns the advantage of fabrication and loss. The equivalent lossless LC circuit model of the proposed structure is established. EM software Sonnet is adopted to design the wide-band filter with bandwidth of 1.4 GHz (from 1.9 GHz to 3.3 GHz). The circuit occupies only 20.6 × 12.8 mm2. Finally, the fabrication and measurement are implemented. A good agreement between simulation and measured results verifies the validity of the design methodology. Baoping Ren, Haiwen Liu, Xuehui Guan, Pin Wen, Xiang Xiao, and Zhewang Ma Copyright © 2016 Baoping Ren et al. All rights reserved. Design and Simulation of a 6-Bit Successive-Approximation ADC Using Modeled Organic Thin-Film Transistors Tue, 15 Mar 2016 09:49:23 +0000 http://www.hindawi.com/journals/apec/2016/7201760/ We have demonstrated a method for using proper models of pentacene P-channel and fullerene N-channel thin-film transistors (TFTs) in order to design and simulate organic integrated circuits. Initially, the transistors were fabricated, and we measured their main physical and electrical parameters. Then, these organic TFTs (OTFTs) were modeled with support of an organic process design kit (OPDK) added in Cadence. The key specifications of the modeled elements were extracted from measured data, whereas the fitting ones were elected to replicate experimental curves. The simulating process proves that frequency responses of the TFTs cover all biosignal frequency ranges; hence, it is reasonable to deploy the elements to design integrated circuits used in biomedical applications. Complying with complementary rules, the organic circuits work properly, including logic gates, flip-flops, comparators, and analog-to-digital converters (ADCs) as well. The proposed successive-approximation-register (SAR) ADC consumes a power of 883.7 µW and achieves an ENOB of 5.05 bits, a SNR of 32.17 dB at a supply voltage of 10 V, and a sampling frequency of about 2 KHz. Huyen Thanh Pham, Thang Vu Nguyen, Loan Pham-Nguyen, Heisuke Sakai, and Toan Thanh Dao Copyright © 2016 Huyen Thanh Pham et al. All rights reserved. Bus Implementation Using New Low Power PFSCL Tristate Buffers Mon, 29 Feb 2016 12:01:38 +0000 http://www.hindawi.com/journals/apec/2016/4517292/ This paper proposes new positive feedback source coupled logic (PFSCL) tristate buffers suited to bus applications. The proposed buffers use switch to attain high impedance state and modify the load or the current source section. An interesting consequence of this is overall reduction in the power consumption. The proposed tristate buffers consume half the power compared to the available switch based counterpart. The issues with available PFSCL tristate buffers based bus implementation are identified and benefits of employing the proposed tristate buffer topologies are put forward. SPICE simulation results using TSMC 180 nm CMOS technology parameters are included to support the theoretical formulations. The performance of proposed tristate buffer topologies is examined on the basis of propagation delay, output enable time, and power consumption. It is found that one of the proposed tristate buffer topology outperforms the others in terms of all the performance parameters. An examination of behavior of available and the proposed PFSCL tristate buffer topologies under parameter variations and mismatch shows a maximum variation of 14%. Neeta Pandey, Bharat Choudhary, Kirti Gupta, and Ankit Mittal Copyright © 2016 Neeta Pandey et al. All rights reserved. Energy-Aware Low-Power CMOS LNA with Process-Variations Management Thu, 18 Feb 2016 06:51:48 +0000 http://www.hindawi.com/journals/apec/2016/8351406/ A reconfigurable low-noise amplifier (LNA) with digitally controllable gain and power consumption is presented. This architecture allows increasing power consumption only when required, that is, to improve LNA’s radiofrequency performance at extreme communication-channel conditions and/or to counteract the effect of process, voltage, and temperature variations. The proposed design leads to significant power saving when a relaxed operation is acceptable. The LNA is implemented in a 130 nm 1.2 V CMOS technology for a 2.4 GHz IEEE-802.15.4 application. Simulated LNA performance (taking into account the worst cases under process variations) is comparable to recently published works. Jorge Luis González, Robson Luiz Moreno, Juan Carlos Cruz, and Diego Vázquez Copyright © 2016 Jorge Luis González et al. All rights reserved. A Novel Inverter Topology for Single-Phase Transformerless PV System Wed, 13 Jan 2016 14:02:57 +0000 http://www.hindawi.com/journals/apec/2016/1962438/ Transformerless photovoltaic (PV) power system is very promising due to its low cost, small size, and high efficiency. One of its most important issues is how to prevent the common mode leakage current. In order to solve the problem, a new inverter is proposed in this paper. The system common mode model is established, and the four operation modes of the inverter are analyzed. It reveals that the common mode voltage can be kept constant, and consequently the leakage current can be suppressed. Finally, the experimental tests are conducted. The experimental results verify the effectiveness of the proposed solution. Haiyan Cao Copyright © 2016 Haiyan Cao. All rights reserved. Anomalous DIBL Effect in Fully Depleted SOI MOSFETs Using Nanoscale Gate-Recessed Channel Process Wed, 28 Oct 2015 09:41:36 +0000 http://www.hindawi.com/journals/apec/2015/609828/ Nanoscale Gate-Recessed Channel (GRC) Fully Depleted- (FD-) SOI MOSFET device with a silicon channel thickness () as low as 2.2 nm was first tested at room temperature for functionality check and then tested at low temperature (77 K) for characterizations. In spite of its FD-SOI nanoscale thickness and long channel feature, the device has surprisingly exhibited a Drain-Induced Barrier Lowering (DIBL) effect at RT. However, this effect was suppressed at 77 K. If the apparition of such anomalous effect can be explained by a parasitic short channel transistor located at the edges of the channel, its suppression is explained by the decrease of the potential barrier between the drain and the channel when lowering the temperature. Avi Karsenty and Avraham Chelly Copyright © 2015 Avi Karsenty and Avraham Chelly. All rights reserved. A High Efficiency Li-Ion Battery LDO-Based Charger for Portable Application Mon, 07 Sep 2015 09:38:55 +0000 http://www.hindawi.com/journals/apec/2015/591986/ This paper presents a high efficiency Li-ion battery LDO-based charger IC which adopted a three-mode control: trickle constant current, fast constant current, and constant voltage modes. The criteria of the proposed Li-ion battery charger, including high accuracy, high efficiency, and low size area, are of high importance. The simulation results provide the trickle current of 116 mA, maximum charging current of 448 mA, and charging voltage of 4.21 V at the power supply of 4.8–5 V, using 0.18 μm CMOS technology. Youssef Ziadi and Hassan Qjidaa Copyright © 2015 Youssef Ziadi and Hassan Qjidaa. All rights reserved. Thermomechanical Behaviour of a PWB by Speckle Interferometry Technique Tue, 18 Aug 2015 09:50:21 +0000 http://www.hindawi.com/journals/apec/2015/141583/ The speckle interferometry technique has been used in this work in order to determine the thermomechanical behaviour of Printed Wiring Board (PWB) (circuits) of a radio integrated with tape player and speakers. A preliminary experiment of such technique has been carried out on a single electronic component (silicon transistor), during the thermal transient and at the steady state. The thermal deformation and stresses on PWB have been obtained through related experimental analyses on both cases. The results showed a very good applicability of speckle technique on the irregular object surface as PWB. Bartolomeo Trentadue and Giuseppe Illuzzi Copyright © 2015 Bartolomeo Trentadue and Giuseppe Illuzzi. All rights reserved. A Very Compact and Sharp Roll-Off Low-Pass Filter with Four Transmission Zeros Tue, 11 Aug 2015 05:48:49 +0000 http://www.hindawi.com/journals/apec/2015/806276/ A novel structure with sharp roll-off, wide stopband, and very compact size is presented in this paper. By combining a capacitor-embedded transmission line ring and two shunt open stubs, this structure exhibits a high-performance three-pole low-pass filter (LPF) response with four generated transmission zeros. With the help of these four transmission zeros, the proposed LPF achieves improved roll-off rate, extended stopband, and significantly very compact size. To verify the feasibility of the proposed structure, a prototype LPF having the cut-off frequency at 0.63 GHz is designed, fabricated, and measured as an illustrative example. Final result shows that a roll-off rate of 109.3 dB/GHz along with a relative stopband bandwidth of 114.6% can be obtained. Moreover, the filter dimensions are as small as 15.7 mm × 26.9 mm, that is, , where is the guided wavelength at the cut-off frequency. The filter structure is simple and easy to fabricate as well. Yang Xiao and Lin Li Copyright © 2015 Yang Xiao and Lin Li. All rights reserved. Analytical Model of Random Variation in Drain Current of FGMOSFET Wed, 15 Jul 2015 08:35:27 +0000 http://www.hindawi.com/journals/apec/2015/315105/ The analytical model of random variation in drain current of the Floating Gate MOSFET (FGMOSFET) has been proposed in this research. The model is composed of two parts for triode and saturation region of operation where the process induced device level random variations of each region and their statistical correlations have been taken into account. The nonlinearity of floating gate voltage and dependency on drain voltage of the coupling factors of FGMOSFET have also been considered. The model has been found to be very accurate since it can accurately fit the SPICE BSIM3v3 based reference obtained by using Monte-Carlo SPICE simulation and FGMOSFET simulation technique with SPICE. It can fit the BSIM4 based reference if desired by using the optimally extracted parameters. By using the proposed model, the variability analysis of FGMOSFET and the analytical modeling of the variation in the circuit level parameter of any FGMOSFET based circuit can be performed. So, this model has been found to be an efficient tool for the variability aware analysis and design of FGMOSFET based circuit. Rawid Banchuin Copyright © 2015 Rawid Banchuin. All rights reserved. Design of a Novel High Power V-Band Helix-Folded Waveguide Cascaded Traveling Wave Tube Amplifier Mon, 01 Jun 2015 09:47:15 +0000 http://www.hindawi.com/journals/apec/2015/846425/ A design of a V-band Helix-Folded Waveguide (H-FWG) cascaded traveling wave tube (TWT) is presented. In this cascaded structure, a digitized nonlinear theory model is put forward first to simulate these two types of the tubes by common process. Then, an initial design principle is proposed, which can design these two different kinds of tubes universally. Using this principle, a high-gain helix TWT is carefully designed as a first stage amplifier followed by a FWG TWT to obtain high power. Simulations predict that a peak power of 800 W with saturated gain of 60 dB from 55 GHz to 60 GHz can be achieved. Tianxiang Zhuge and Yulu Hu Copyright © 2015 Tianxiang Zhuge and Yulu Hu. All rights reserved. Usage and Limitation of Standard Mobility Models for TCAD Simulation of Nanoscaled FD-SOI MOSFETs Tue, 26 May 2015 12:17:42 +0000 http://www.hindawi.com/journals/apec/2015/460416/ TCAD tools have been largely improved in the last decades in order to support both process and device complementary simulations which are usually based on continuously developed models following the technology progress. In this paper, we compare between experimental and TCAD simulated results of two kinds of nanoscale devices: ultrathin body (UTB) and nanoscale Body (NSB) SOI-MOSFET devices, sharing the same W/L ratio but having a channel thickness ratio of 10 : 1 (46 nm and 4.6 nm, resp.). The experimental transfer I-V characteristics were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a large gate voltage dependent series resistance (). TCAD tools do not usually consider to be either channel thickness or gate voltage dependent. After observing a clear discrepancy between the mobility values extracted from our measurements and those modeled by the available TCAD models, we propose a new semiempirical approach to model the transfer characteristics. A. Ciprut, A. Chelly, and A. Karsenty Copyright © 2015 A. Ciprut et al. All rights reserved. Control for the Three-Phase Four-Wire Four-Leg APF Based on SVPWM and Average Current Method Mon, 16 Mar 2015 13:12:29 +0000 http://www.hindawi.com/journals/apec/2015/528360/ A novel control method is proposed for the three-phase four-wire four-leg active power filter (APF) to realize the accurate and real-time compensation of harmonic of power system, which combines space vector pulse width modulation (SVPWM) with triangle modulation strategy. Firstly, the basic principle of the APF is briefly described. Then the harmonic and reactive currents are derived by the instantaneous reactive power theory. Finally simulation and experiment are built to verify the validity and effectiveness of the proposed method. The simulation results show that the response time for compensation is about 0.025 sec and the total harmonic distortion (THD) of the source current of phase is reduced from 33.38% before compensation to 3.05% with APF. Xiangshun Li and Jianghua Lu Copyright © 2015 Xiangshun Li and Jianghua Lu. All rights reserved.