Massive Exploration of Perturbed Conditions of the Blood Coagulation Cascade through GPU Parallelization

Figure 4

Schematic description of memory hierarchies in Fermi and Kepler architectures. GPUs relying on these architectures are equipped with a two-level data cache and a read-only data cache. Shared memory and L1 cache share the same on-chip 64 KB memory banks; the amount of memory can be reconfigured by the user, according to the specific needs of the application. Figure taken from Nvidia’s Kepler GK110 whitepaper [57].