Logic Design and Power Optimization of Floating-Point Multipliers

Table 3

Power consumption table of each fixed-point multiplier of 85c.

2 GHz (TCH-85C)	max_delay	Area (combination)	Power
fmpy_24	0.5	298.752	2.894E − 05
normal_24	0.5	529.4208	2.947E − 04
boothwallace_24	0.5	324.2592	2.116E − 04