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Complexity
Volume 2018, Article ID 2806976, 10 pages
https://doi.org/10.1155/2018/2806976
Research Article

Fractional-Order Memristor Emulator Circuits

1UATx, Mexico
2ITESM, Mexico

Correspondence should be addressed to C. Sánchez-López; xm.moc.oohay@xmnaslrac

Received 16 March 2018; Revised 24 April 2018; Accepted 24 April 2018; Published 28 May 2018

Academic Editor: Viet-Thanh Pham

Copyright © 2018 C. Sánchez-López et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. J. Vlach and K. Singhal, Computer Methods for Circuit Analysis and Design, Kluwer, Norwell, MA, USA, 1981.
  2. A. Adamatzky and L. Chua, Eds., Memristor Networks, Springer, Switzerland, 2014. View at Publisher · View at Google Scholar · View at MathSciNet
  3. R. Tetzlaff, Memristors and Memristive Systems, Springer, New York, NY, USA, 2014. View at Publisher · View at Google Scholar
  4. K. B. Oldham and J. Spanier, The Fractional Calculus: Theory and Applications of Differentiation and Integration to Arbitrary Order, Academic Press, New York, NY, USA, 1974. View at MathSciNet
  5. R. Hilfer, Applications of Fractional Calculus in Physics, World Scientific, Singapore, 2001. View at Publisher · View at Google Scholar · View at MathSciNet
  6. R. Caponetto, G. Dongola, L. Fortuna, and I. Petras, Fractional Order Systems: Modeling and Control Applications, World Scientific Publishing, 2010.
  7. I. Petras, Fractional-Order Nonlinear Systems: Modeling, Analysis and Simulation, Springer, Berlin, Germany, 2011.
  8. F. Padula and A. Visioli, Advances in Robust Fractional Control, Springer, New York, NY, USA, 2014.
  9. M. E. Fouda and A. G. Radwan, “On the fractional-order memristor model,” Journal of Fractional Calculus and Applications, vol. 4, no. 1, pp. 1–7, 2013. View at Google Scholar
  10. J. Tenreiro Machado, “Fractional generalization of memristor and higher order elements,” Communications in Nonlinear Science and Numerical Simulation, vol. 18, no. 2, pp. 264–275, 2013. View at Publisher · View at Google Scholar · View at MathSciNet
  11. M.-S. Abdelouahab, R. Lozi, and L. Chua, “Memfractance: A Mathematical Paradigm for Circuit Elements with Memory,” International Journal of Bifurcation and Chaos, vol. 24, no. 9, Article ID 1430023-1, 2014. View at Publisher · View at Google Scholar · View at Scopus
  12. Y.-F. Pu and X. Yuan, “Fracmemristor: fractional-order memristor,” IEEE Access, vol. 4, pp. 1872–1888, 2016. View at Publisher · View at Google Scholar · View at Scopus
  13. F. Z. Wang, L. Shi, H. Wu, N. Helian, and L. O. Chua, “Fractional memristor,” Applied Physics Letters, vol. 111, no. 24, Article ID 243502, 2017. View at Publisher · View at Google Scholar · View at Scopus
  14. S. H. Rashad, E. M. Hamed, M. E. Fouda, A. M. AbdelAty, L. A. Said, and A. G. Radwan, “On the analysis of current-controlled fractional-order memristor emulator,” in Proceedings of the 2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–4, Thessaloniki, Greece, May 2017. View at Publisher · View at Google Scholar
  15. C. Sánchez-López, J. Mendoza-López, M. A. Carrasco-Aguilar, and C. Muñiz-Montero, “A floating analog memristor emulator circuit,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 61, no. 5, pp. 309–313, 2014. View at Google Scholar
  16. C. Sánchez-López, M. A. Carrasco-Aguilar, and C. Muñiz-Montero, “A 16 Hz-160 kHz memristor emulator circuit,” International Journal of Electronics and Communications, vol. 61, no. 5, pp. 1–12, 2015. View at Google Scholar
  17. C. Sánchez-López and L. E. Aguila-Cuapio, “A 860 kHz grounded memristor emulator circuit,” AEÜ - International Journal of Electronics and Communications, vol. 73, pp. 23–33, 2017. View at Publisher · View at Google Scholar · View at Scopus
  18. A. S. Elwakil, M. E. Fouda, and A. G. Radwan, “A simple model of double-loop hysteresis behavior in memristive elements,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 60, no. 8, pp. 487–491, 2013. View at Publisher · View at Google Scholar · View at Scopus
  19. A. Charef, “Analogue realisation of fractional-order integrator, differentiator and fractional PID μ controller,” IEE Proceedings—Control Theory and Applications, vol. 153, no. 6, pp. 714–720, 2006. View at Publisher · View at Google Scholar
  20. D. Goyal and P. Varshney, “CCII and RC fractance based fractional order current integrator,” Microelectronics Journal, vol. 65, pp. 1–10, 2017. View at Publisher · View at Google Scholar · View at Scopus
  21. C. Muñiz-Montero, L. V. García-Jiménez, L. A. Sánchez-Gaspariano et al., “New alternatives for analog implementation of fractional-order integrators, differentiators and PID controllers based on integer-order integrators,” Nonlinear Dynamics, vol. 90, no. 1, pp. 241–256, 2017. View at Publisher · View at Google Scholar · View at MathSciNet
  22. C. Muñiz-Montero, L. A. Sánchez-Gaspariano, C. Sánchez-López et al., “On the electronic realizations of fractional-order phase-lead-lag compensators with OpAmps and FPAAs,” in Fractional order control and synchronization of chaotic systems, A. Azar, S. Vaidyanathan, and A. Ouannas, Eds., vol. 688 of Stud. Comput. Intell., pp. 131–164, Springer, Cham, Switzerland, 2017. View at Publisher · View at Google Scholar · View at MathSciNet
  23. J. C. Trigeassou, N. Maamri, J. Sabatier, and A. Oustaloup, “Transients of fractional-order integrator and derivatives,” Signal, Image and Video Processing, vol. 6, no. 3, pp. 359–372, 2012. View at Publisher · View at Google Scholar · View at Scopus
  24. A. G. Radwan, A. M. Soliman, A. S. Elwakil, and A. Sedeek, “On the stability of linear systems with fractional-order elements,” Chaos, Solitons & Fractals, vol. 40, no. 5, pp. 2317–2328, 2009. View at Publisher · View at Google Scholar
  25. C. Sánchez-López, M. A. Carrasco-Aguilar, and F. E. Morales-López, “Offset reduction on memristor emulator circuits,” in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, vol. 1, pp. 296–299, December 2015. View at Publisher · View at Google Scholar · View at Scopus
  26. Sánchez-López, “A 1.7 MHz Chuas circuit using VMs and CF+s,” Revista Mexicana de Física, vol. 58, no. 1, pp. 86–93, 2012. View at Google Scholar
  27. I. Carro-Pérez, H. Gonzalez-Hernandez, and C. Sanchez-Lopez, “High-frequency memristive synapses,” in Proceedings of the 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), pp. 1–4, Bariloche, Argentina, Feburary 2017. View at Publisher · View at Google Scholar
  28. I. Carro-Pérez, C. Sánchez-López, and H. G. González-Hernández, “Experimental verification of a memristive neural network,” Nonlinear Dynamics, pp. 1–18, 2018. View at Publisher · View at Google Scholar