Table of Contents Author Guidelines Submit a Manuscript
International Journal of Antennas and Propagation
Volume 2015, Article ID 294590, 9 pages
http://dx.doi.org/10.1155/2015/294590
Research Article

Comparative Study of Crosstalk Reduction Techniques in RF Printed Circuit Board Using FDTD Method

1Department of Electronics and Communication Engineering, Velammal College of Engineering and Technology, Viraganoor, Madurai 625 009, India
2Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Madurai 625 015, India

Received 12 February 2015; Revised 24 May 2015; Accepted 31 May 2015

Academic Editor: Francesco D’Agostino

Copyright © 2015 Rajeswari Packianathan and Raju Srinivasan. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Miniaturization of the feature size in modern electronic circuits results from placing interconnections in close proximity with a high packing density. As a result, coupling between the adjacent lines has increased significantly, causing crosstalk to become an important concern in high-performance circuit design. In certain applications, microstriplines may be used in printed circuit boards for propagating high-speed signals, rather than striplines. Here, the electromagnetic coupling effects are analyzed for various microstrip transmission line structures, namely, microstriplines with a guard trace, double stub microstriplines, and parallel serpentine microstriplines using the finite-difference time-domain method. The numerical results are compared with simulation results, where the variants are simulated using an Ansoft high-frequency structure simulator. The analysis and simulation results are experimentally validated by fabricating a prototype and establishing a good correspondence between them. Numerical results are compared with simulation and experimental results, showing that double stub microstriplines reduce the far end crosstalk by 7 dB and increase the near end crosstalk by about 2 dB compared with the parallel microstriplines. Parallel serpentine microstriplines reduce the far end crosstalk by more than 10 dB and also reduce more than 15 mV of peak far end crosstalk voltage, compared with parallel microstriplines.

1. Introduction

Rapid advancements in semiconductor technology, increasing the operating frequency, reducing the feature size, and increasing the clock frequency to 3 GHz and above, have resulted in crosstalk in high-speed printed circuit boards. Crosstalk has become a key source of performance degradation and signal integrity problems in the design of high-speed printed circuit boards. Because of the close proximity and high density of interconnections, the signal on one line may couple to the adjacent victim line, resulting in crosstalk. Striplines or microstrip transmission lines are generally used to transmit high-speed signals and chip-to-chip interconnections. Crosstalk voltages are induced at the far and near ends of the victim line when a signal is propagating in the aggressor line, introducing far end crosstalk (FEXT) and near end crosstalk (NEXT). Therefore, designing signal routing with an acceptable crosstalk level is crucial in printed circuit boards.

Researchers have proposed various signal routing topologies to reduce the crosstalk between adjacent lines [16]. One of the general solutions is to increase the distance between the two lines. However, this increases the real estate of the printed circuit board, resulting in a reduction in the packaging density [2]. Another method is to insert a guard trace between the two lines, which is not very effective since it cannot maintain a constant potential throughout the entire line [1]. Alternatively, a stitched guard has been proposed to effectively reduce the crosstalk. However, this is not suitable for backplane routing [2]. Stub-alternated microstriplines have been used to reduce FEXT, in which vertical stubs are distributed alternatingly with the parallel microstriplines [3, 4]. Parallel serpentine microstriplines, in which both the aggressor and victim lines are in serpentine form, have been proposed [5]. It has been reported that this method is an effective routing method to reduce crosstalk of more than 40%, but it increases the NEXT and needs a larger fabrication area, resulting in a lower packaging density.

Numerical analysis of the crosstalk between microstriplines on printed circuit boards (PCBs) with the aid of computation needs to be precise and effective. Calculations on PCB crosstalk using the transmission line matrix (TLM) method are presented in [7]. The finite element method (FEM) is another method that allows irregular discretization, which aids in modeling complex geometries [8, 9], but needs additional computation to formulate and solve large matrices. The crosstalk between microstriplines on PCBs has also been studied with the finite-difference time-domain method (FDTD) and a circuit model [9]. In this paper, one benchmark problem is considered and numerical results are presented. Several investigations on crosstalk with the aid of FDTD [1013] have been reported. FDTD is a good application prospect to study the signal integrity of high-speed interconnections because of its features, namely, its computational efficiency and memory reduction. With this method, a differential time-domain numerical modeling technique is used to calculate the electric () and magnetic () fields, covering a wide range of frequencies during a single simulation run.

Here, the crosstalk between parallel microstripline and its variants, namely, microstriplines with a guard trace, single stub microstriplines, double stub microstriplines, and parallel serpentine microstriplines, are analyzed using FDTD to shed some light on the crosstalk behavior with respect to frequency.

2. Microstripline Structures

Figure 1 illustrates parallel microstriplines on a PCB, where line 1 is the aggressor line and line 2 is the victim line in which crosstalk is induced. In these lines, the source is at one end of the aggressor line and the other end of the same line is terminated by a 50 Ω load. Both the NEXT and FEXT are expressed in terms of inductive and capacitive coupling [14]. Figure 2 shows traces on printed circuit boards in which one side of the microstripline is exposed to air. In PCBs, the traces are printed on a dielectric layer and the ground plane is placed on the other side of the dielectric layer. The lines were assumed to be parallel with the same width () along the length (). The substrate had a dielectric constant of and thickness of . The strip conductor had a thickness of and a width of . The separation between two lines is denoted by .

Figure 1: Model of the parallel lines on a printed circuit board.
Figure 2: (a) Parallel microstriplines and (b) microstriplines with a guard trace.

Figure 2(a) shows conventional parallel microstriplines, separated by a distance . In the parallel microstriplines, the inductive coupling was greater than the capacitive coupling.

One general solution to reduce crosstalk is to increase the separation between the aggressor and victim lines. However, this occupies more space, resulting in a reduced packaging density. Another way is to insert a guard trace between the aggressor and victim lines, inserted at a distance of (see Figure 2(b)), which acts as a shield line between the two lines, reducing the crosstalk. The length and width of the guard trace were taken to be the same as those of the aggressor and victim lines to reduce the complexity. This could not maintain a constant potential throughout the line because of the imbalance in the impedance. Alternatively, via-stitched guard trace could be used to reduce crosstalk, but this is not suitable for backplane routing.

A stub-alternated microstripline is an alternate routing topology used to reduce crosstalk, where stubs are uniformly distributed over any one of the parallel lines, as shown in Figure 3(a). The length of the unit structure is and the length of each stub is . The width of each stub was equal to the width of the microstriplines to prevent reflections [3]. The increase in the electric field at the edges of the stubs induced larger capacitive coupling, while the inductive coupling was barely affected, as the stubs were perpendicular to the current flow. However, the NEXT only increased slightly because of the increase in the capacitive coupling. If the propagation delay through the unit structure with the length was sufficiently small compared with the signal transition time, the structural uniformity was valid and the line with alternating stubs could be regarded as a transmission line. With this method, capacitive coupling could be increased by providing a small change in the inductive coupling. Figure 3(b) shows the stub-alternated microstripline that has stubs vertically attached to both the aggressor and victim lines [4]. Serpentine microstriplines were proposed by Lee et al. [5] to further reduce the crosstalk to a point where the two serpentine lines are parallel, as shown in Figure 4. This structure consists of a unit section block of length , which is repeated along the length direction.

Figure 3: (a) Single stub configuration. (b) Double stub configuration.
Figure 4: Parallel serpentine microstriplines.

Each unit section block has two vertical and two horizontal segments [5]. The vertical segments of the aggressor and victim lines were aligned with each other along the length direction with a narrow spacing. This spacing increased the mutual capacitance between the aggressor and victim lines. The vertical segments of the serpentine microstriplines increased the capacitive coupling, which may be equal to the inductive coupling. This led to a reduction in the crosstalk [6].

3. FDTD Method

FDTD can be used to solve 1D, 2D, and 3D electromagnetic problems. The FDTD method was formulated by modifying Maxwell’s curl equations to central difference approximations and then it was discretized [15]. Now Maxwell’s curl equations in the time-domain will be considered:

These equations give solutions for the electric and magnetic fields. In (1), represents the electric field intensity and is the magnetic flux density, which can be written in terms of and aswhere denotes the permeability and is the permittivity. The structure was assumed to be lossless and the medium was isotropic and homogeneous.

The tangential component of the electric field is zero for perfectly conducting surfaces. This boundary condition implies that the normal component of the magnetic field is also zero on the surfaces. The basic Yee algorithm was used to implement the space derivatives of the curl operations. A Yee cell can be formed with cubical elements of dimensions , , and in the , , and directions, respectively. The entire computational domain was made up of this Yee cell [15].

Figure 5 shows the electric field component enclosed by the magnetic field components and the magnetic field component enclosed by the electric field components. The six field components , , , , , and for the unit cell are shown in Figure 5. The electric and magnetic fields in interleaved Cartesian space were calculated alternatingly in time and space with a leap-frog algorithm. There was a half-space step between the two field vectors. The locations of these vectors are marked as in the indices in (4)–(9). In these equations, the superscripts indicate the time step and the subscripts indicate the position of the field components in a rectangular coordinate system. Using a leap-frog algorithm, the new field components at were calculated from the previous field components using (4)–(6). Then the new field components at were calculated using (7)–(9). The process was then repeated until the last time step was reached:The time increment must obey the boundary conditions given in (10), known as the Courant-Friedrichs-Lewy (CFL) stability criterion [16]. Consider

Figure 5: Unit cell in a rectangular coordinate system.

Here is the propagation velocity and , , and are the minimum cell spacing dimensions in the FDTD unit cell. The time step for each cell was chosen to be the maximum time step that satisfied the Courant condition. The frequency responses of the microstripline structures were measured with a vector network analyzer, in which the source resistance was fixed and a voltage source model was used to simulate the source excitation with the FDTD method. In this voltage source model, the current was replaced by a voltage and a resistance. This model can be written aswhere is the internal source resistance and is the voltage excitation. This voltage pulse is given as [16]where is the pulse width and is the time-delay.

The scattering parameters could be obtained by taking the Fourier transform of the transient waveforms. A Gaussian pulse was suitable for source excitation because the frequency spectrum of the pulse was Gaussian.

4. Results and Discussion

The crosstalk models given in Figures 24 were etched on FR4 substrates with and a thickness of 1.6 mm. The ground plane was on the other side of the substrate. The physical dimensions mentioned in Figures 24 were considered for the numerical simulations. The numerical results with the FDTD method were obtained over the frequency range from 0 to 10 GHz. The simulation parameters for the microstriplines and their variations (Figures 24) are given in Table 1 [17].

Table 1: Parameters of the microstripline structures (in mils).

In the analysis, the spatial dimensions , , and were chosen to be 0.05 mm, 0.5 mm, and 0.265 mm along the , , and directions, respectively. The total mesh dimensions were 50 × 420 × 50 cells in the , , and directions, respectively. In the FDTD analysis, convergent numerical results were obtained by appropriately selecting the time and spatial parameters. Based on the stability criterion, the time step was 0.441 ps [16] because the convergence of the solution depended on the time and spatial parameters. The length of the structure was 8000 mils, whereas the width of the strip was 14 mils. Lines 1 and 2 had the same length and were separated by 19 mils, as depicted in Figure 2. The resistive voltage source was induced at port with a matching impedance of 50 Ω at both the source and load.

The length and width of the stub were chosen to be 14 mils and 14 mils, respectively, as shown in Figure 3. For the parallel serpentine microstriplines, the vertical segment was chosen to be 14 mils and the horizontal segment was taken as 60 mils for the analysis. The numerical results of the NEXT, FEXT, insertion loss, and return loss are shown in Figure 6 for various structures.

Figure 6: Numerical results for various microstripline structures for the (a) NEXT and (b) FEXT. (c) Insertion loss; (d) return loss.

The crosstalk was calculated in terms of the parameters and , for the NEXT and FEXT, respectively, obtained from simple numerical formulas [16]. From the FDTD simulation results, a double stub configuration reduced the FEXT by more than 3 dB and increased the NEXT by about 8 dB compared with parallel microstriplines. Parallel serpentine microstriplines reduced the FEXT and NEXT by more than 7 dB and about 2 dB, compared with double stub configuration. The NEXT levels for both the parallel microstriplines and microstriplines with guard trace were the same, but the microstriplines with guard trace reduced the FEXT by about 2 dB. Parallel serpentine microstripline gives lower insertion loss than parallel microstripline and microstripline with guard trace.

To verify the FDTD formulation, all of the crosstalk models were also simulated using an Ansoft high-frequency structure simulator (HFSS) [18] with the same frequency range of 0–10 GHz. The results obtained with this simulation tool are given in Figure 7. The HFSS simulation results showed that the double stub configuration reduced the FEXT by 9 dB and increased the NEXT by about 2 dB compared with the parallel microstriplines. Parallel serpentine microstriplines reduced the FEXT and NEXT by more than 2 dB and about 6 dB, compared with double stub configuration. The simulation results of FEXT and NEXT were the same as that of numerical results obtained from FDTD method. The double stub microstripline reduced the FEXT by more than 35%, but it increased the NEXT by more than 12%. The stub-alternated microstripline performed well at reducing the FEXT and in the cost of the increase in the NEXT and the routing area. Parallel serpentine microstriplines provide better return loss than other microstriplines and the double stub configuration gives lower insertion loss than other microstripline structures. The results of insertion loss and return loss are the same as that of numerical results.

Figure 7: Simulation results for various microstripline structures for the (a) NEXT and (b) FEXT. (c) Insertion loss; (d) return loss.

To verify the simulation results, all of the structures were fabricated, as shown in Figure 8. All of the structures were printed on FR4 substrates with and a thickness of 1.6 mm. An input signal was applied at port , which was the source end of the active line. The NEXT () and FEXT () were measured at ports and , respectively, with respect to port and the other ports were connected to 50 Ω termination resistors. In this study, parallel microstripline occupies 242.58 mm2 space. Serpentine microstripline needs 314.84 mm2, but double stub configuration requires 438.70 mm2 routing area. Comparing with parallel microstriplines, double stub configuration occupies more space. But parallel serpentine microstripline requires less space than double stub configuration. Hence the parallel serpentine microstripline leads to increase in the packaging density with better crosstalk performance than parallel microstriplines.

Figure 8: Photograph of test board with various microstripline structures.

The profiles of characteristic impedance of both double stub configuration and parallel serpentine microstriplines (Figure 9) were measured using a Time-Domain Reflectometer (TDR) with an initial rise time of 50 ps. The discontinuities may introduce boundaries at each unit section of serpentine microstriplines and double stub configuration. However, the impedance variation of the parallel serpentine microstripline along the length direction is not larger than that of the parallel microstriplines. The effects of discontinuities of each unit section serpentine structure may be ignored for the signals with more than 50 ps rise time.

Figure 9: Characteristic impedance profile.

Figure 9 shows the measured results for the NEXT, FEXT, insertion loss, and return loss in different microstripline structures. It also shows that the double stub configurations reduced the FEXT by more than 7 dB, but the increase in the NEXT was about 2 dB more than conventional microstriplines. However, this configuration needs more line spacing, resulting in a reduced packaging density. Parallel serpentine microstriplines reduced the FEXT by more than 40% and there was no significant reduction in the NEXT compared with conventional microstriplines.

FEXT and NEXT voltage waveforms were measured on various microstripline structures using a TDR (Figures 10 and 11). A TDR source with an initial rise time of 50 ps is applied to the aggressor line and crosstalk voltage was measured at both ends of victim line. Compared with conventional microstriplines, parallel serpentine microstriplines reduced the peak near end crosstalk voltage by more than 10 mV and reduced far end crosstalk voltage by more than 15 mV.

Figure 10: Measured results for various microstripline structures for the (a) NEXT and (b) FEXT. (c) Insertion loss; (d) return loss.
Figure 11: Time-domain measured results for various microstripline structures for the (a) near end crosstalk voltage and (b) far end crosstalk voltage.

Eye diagrams of various microstripline structures were measured and given in Figure 12. For this measurement, a 1 Gbps, 215-1 PRBS signal was applied to the aggressor line and 100 Mbps 27-1 PRBS signal was applied to the victim line. These two signals were synchronized. Parallel serpentine microstripline reduced more than 25 ps of jitter than other microstripline structures.

Figure 12: Eye diagram at 1 Gbps PRBS: (a) parallel microstriplines; (b) microstriplines with guard trace; (c) double stub configuration; (d) parallel serpentine microstriplines.

The analysis and simulation results were experimentally validated, establishing a good agreement between them. The numerical, HFSS simulation and measured results show that there were fewer discrepancies between the simulation and measured results. The discrepancies between the measured and simulated results were contributed to by fabrication errors, which are not related to the consequences of the thickness of the conductors in the simulation and frequency-dependent nonconductor losses as well as instrumentation losses.

5. Conclusions

In this paper, the NEXT and FEXT between various microstrip structures on printed circuit boards were analyzed using FDTD with a frequency range up to 10 GHz. The results obtained from the FDTD and Ansoft HFSS simulations were compared with the measured results. There was good agreement between the simulation and experimental results. Compared with parallel microstriplines, the double stub microstriplines reduced the FEXT by more than 35%, but it increased the NEXT by more than 12%. Stub-alternated microstriplines performed well in reducing the FEXT and in the cost of increasing the NEXT and routing area. Parallel serpentine microstriplines reduced the FEXT by more than 10 dB and the NEXT by about 2 dB more than other structures. The FEXT levels for both the double stub configuration and parallel microstriplines with guard trace were the same, but the parallel serpentine microstriplines reduced the FEXT by about 15 mV more than parallel microstriplines. For highly dense interconnections, the FEXT and NEXT must be reduced further, with a minimum fabrication space. Hence, novel routing topologies are required.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

References

  1. L. Zhi, W. Qiang, and S. Changsheng, “Application of guard traces with vias in the RF PCB layout,” in Proceedings of the 3rd International Symposium on Electromagnetic Compatibility, pp. 771–774, Beijing, China, 2002.
  2. A. Suntives, A. Khajooeizadeh, and R. Abhari, “Using via fences for crosstalk reduction in PCB circuits,” in Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (EMC '06), pp. 34–37, August 2006. View at Scopus
  3. H.-H. Li, C.-J. Guo, and Y. Zhang, “Research of crosstalk reduction between microstrip lines based on high-speed PCBs,” in Proceedings of the 9th International Symposium on Antennas Propagation and EM Theory (ISAPE' 10), pp. 994–997, December 2010. View at Publisher · View at Google Scholar · View at Scopus
  4. S.-K. Lee, K. Lee, H.-J. Park, and J.-Y. Sim, “FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel links,” Electronics Letters, vol. 44, no. 4, pp. 272–273, 2008. View at Publisher · View at Google Scholar · View at Scopus
  5. K. Lee, H.-K. Jung, H.-J. Chi, H.-J. Kwon, J.-Y. Sim, and H.-J. Park, “Serpentine microstrip lines with zero far-end crosstalk for parallel high-speed DRAM interfaces,” IEEE Transactions on Advanced Packaging, vol. 33, no. 2, pp. 552–558, 2010. View at Publisher · View at Google Scholar · View at Scopus
  6. P. Rajeswari and S. Raju, “Comparative study of crosstalk Reduction Techniques for Parallel Microstriplines,” in Advances in Communication, Network, and Computing, vol. 108 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, pp. 422–425, Springer, Berlin, Germany, 2012. View at Publisher · View at Google Scholar
  7. G. N. Mulay and K. S. Jog, “Application of PML to open boundary problem using TLM method,” Electronics Letters, vol. 37, no. 4, pp. 213–215, 2001. View at Publisher · View at Google Scholar · View at Scopus
  8. K. Hollaus, O. Bíró, P. Caldera et al., “Electromagnetic field computation of simple structures on printed circuit boards by the finite-element method,” IEEE Transactions on Magnetics, vol. 42, no. 4, pp. 815–818, 2006. View at Publisher · View at Google Scholar · View at Scopus
  9. K. Hollaus, O. Bíró, P. Caldera, G. Matzenauer, G. Paoli, and G. Plieschnegger, “Simulation of crosstalk on printed circuit boards by FDTD, FEM, and a circuit model,” IEEE Transactions on Magnetics, vol. 44, no. 6, pp. 1486–1489, 2008. View at Publisher · View at Google Scholar · View at Scopus
  10. G. D. Kondylis, F. de Flaviis, G. J. Pottie, and T. Itoh, “A memory-efficient formulation of the finite-difference time-domain method for the solution of Maxwell equations,” IEEE Transactions on Microwave Theory and Techniques, vol. 49, no. 7, pp. 1310–1320, 2001. View at Publisher · View at Google Scholar · View at Scopus
  11. P. C. Cherry and M. F. Iskander, “FDTD analysis of high frequency electronic interconnection effects,” IEEE Transactions on Microwave Theory and Techniques, vol. 43, no. 10, pp. 2445–2451, 1995. View at Publisher · View at Google Scholar · View at Scopus
  12. P. Supanakoon, M. Chamchoy, P. Rawiwan et al., “Analysis and reduction of crosstalk on coupled microstrip lines using FDTD method,” in Proceedings of the International Technical Conference on Circuits/Systems, Computers and Communications, 2002.
  13. F. Xiao, W. Liu, and Y. Kami, “Analysis of crosstalk between finite-length microstrip lines: FDTD approach and circuit-concept modeling,” IEEE Transactions on Electromagnetic Compatibility, vol. 43, no. 4, pp. 573–578, 2001. View at Publisher · View at Google Scholar · View at Scopus
  14. Y.-S. Sohn, J.-C. Lee, H.-J. Park, and S.-I. Cho, “Empirical equations on electrical parameters of coupled microstrip lines for crosstalk estimation in printed circuit board,” IEEE Transactions on Advanced Packaging, vol. 24, no. 4, pp. 521–527, 2001. View at Publisher · View at Google Scholar · View at Scopus
  15. A. Taflove and S. C. Hagness, Computational Electrodynamics: The Finite-Difference Time-Domain Method, Artech House, Boston, Mass, USA, 2nd edition, 2000. View at MathSciNet
  16. D. M. Sullivan, Electromagnetic Simulation Using the FDTD Method, IEEE Press Series on RF and Microwave Technology, IEEE Press, New York, NY, USA, 2000.
  17. DDR3 SDRAM Specification, Samsung Electronics, 2009.
  18. Ansoft HFSS, User's Guide—High Frequency Structure Simulator, Ansoft Corporation, Pittsburgh, Pa, USA, 2005.