FPGA Implementation of Real-Time Compressive Sensing with Partial Fourier Dictionary

Table 1

Resources utilization.

Logic utilization	Used	Available	Utilization
Registers	193,053	866,400	22%
LUTs	282,332	433,200	65%
Block RAM/FIFO	573	1,470	39%
DSP48Es	1,745	3,600	48%