Research Article | Open Access
Wen An Tsou, Wen Shen Wuen, Tzu Yi Yang, Kuei Ann Wen, "Analysis and Compensation of the AM-AM and AM-PM Distortion for CMOS Cascode Class-E Power Amplifier", International Journal of Microwave Science and Technology, vol. 2009, Article ID 597592, 9 pages, 2009. https://doi.org/10.1155/2009/597592
Analysis and Compensation of the AM-AM and AM-PM Distortion for CMOS Cascode Class-E Power Amplifier
Analysis and compensation methodology of the AM-AM and AM-PM distortion of cascode class-E power amplifiers are presented. A physical-based model is proposed to illustrate that the nonlinear capacitance and transconductance cause the AM-AM and AM-PM distortion when modulating the supply voltage of the PA. A novel methodology that can reduce the distortion is also proposed. By degenerating common-gate transistor into a resistor, the constant equivalent impedance is obtained so that the AM-AM and AM-PM distortion is compensated. An experimental prototype of 2.6 GHz cascode class-E power amplifier with the AM-AM and AM-PM compensation has been integrated in a 0.18 m CMOS technology, occupies a total die area of 1.6 . It achieves a drain efficiency of 17.8% and a power-added efficiency of 16.6% while delivering 12 dBm of linear output power and drawing 31 mA from a 1.8 V supply. Finally, a co-simulation result demonstrated that, when the distortion of the PA has been compensated, the EVM is improved from −17 dB to −19 dB with an IEEE802.11a-like signal source.
To increase the data rate, recent wireless communication systems allow the carried information encoded in both amplitude and phase of the RF signal and therefore a linear power amplifier (PA) is required. The linearity achieved in such amplifiers by operating below their maximum output power has the drawback of low efficiency and hence reduced battery lifetime. The switching class-E amplifier is a potential candidate for power amplification in wireless transceivers . However, the PA nonlinearity, the AM-AM and AM-PM distortion, causes the amplitude error and phase error on the output signal and then will severely degrade the emission performance of the system. As discussed in , the phase distortion in the class-E power amplifier should be less than the maximum accepted value (5°) in the OFDM-based transmitters.
For highly integrated transceivers, many researches have been focused on the switching class-E PA [3–7], by far the most efficient because hard switching operation and zero voltage switching (ZVS) conditions allow a strong reduction of power losses . In CMOS, switching class-E amplifiers have been integrated with great success since a CMOS technology basically is a digital technology. Unfortunately, class-E amplifiers feature high peak voltages and currents, that seriously stress MOS devices, severely threatening circuit functionality. Moreover, device stacking, in class-E-based PAs, is a viable way to reduce the voltage swing on each device for reliability issues . Cascode class-E PAs are allowed for reliability considerations. However, the linearity problem of the AM-AM and AM-PM distortion during supply modulation is the other design challenge to be concerned.
After identifying the main sources of the distortion in a cascode class-E PA in Section 2, this paper gives insights in the mechanisms of the distortion peculiar of a solution based on the cascode topology and proposed a design methodology for minimizing this distortion, in Section 3. Section 4 describes a design of 0.18 m CMOS solution, comprising a class-E power amplifier and a self-biased control circuit. Experimental results are also presented in Section 5. Results of a system cosimulation are compared in Section 6. Finally, Section 7 draws conclusions.
2. Class-E PA Design
2.1. Basic Principle
In class-E PA, the voltage-current separation for efficiency enhancement is obtained by using a tuned LC network. The switch is closed at the instant where both the switch voltage and its first derivative are zero. The requirement of a zero first derivation makes the amplifier less sensitive to component variations. This leads to the well-known class-E conditions as stated by N. O. Sokal and A. D. Sokal :
where represents the instant at which the switch closes, and represents the switching voltage.
Figure 1 depicts a circuit that can satisfy the class-E requirements, provided that the correct component values are chosen. If the nMOS transistor is driven by a square wave, it can be viewed as a voltage controlled switch with a nonzero on-resistance . The lowpass matching network made of and transforms 50 , representative of the antenna resistance, into a lower value . The value of is chosen to deliver a desired amount of power with a specific supply voltage . This network acting as a filter also rejects the harmonics of the class-E waveform at the drain of the nMOS switch. In the original class-E design of Sokal, the RF-choke () is made very large so it acts as a current source. and form a series resonator tuned at the desired frequency. Since the class-E working conditions are given by two equations, two components of the circuit can be chosen in such a way that the amplifier fulfills the class-E working conditions. For the circuit of Figure 1, these two components are the capacitor and the inductor . In this way, all components are determined.
2.2. Cascode-Based Topology
Regarding gate-oxide breakdown which occurs, if high voltages drop across the gate oxide, deserves particular care in a conventional common-source class-E PA . Due to the class-E operation, the peak drain voltage when the device is off can be as large as 3.56 times the DC supply value . For reliability issues, some efforts had been made to break up with the cascode solution, depicted in Figure 2 [6, 12–14].
An additional device () is placed in series with the switching device (). In this way, the peak voltage is divided between the two devices and the maximum oxide voltage drop is reduced.
In general, from the reliability standpoint, the bias voltage of the common-gate transistor is specified by the supply. For highly integration, an RF-choke is replaced by a small dc-feed. However, in practice, has a finite on-resistance and the transition time from the off-state to the on-state. These factors cause a certain amount of power dissipation on the switch, resulting in a reduction in power efficiency .
2.3. AM-AM and AM-PM Distortion
The AM-AM distortion is the difference between the supply voltage and the envelope of the RF output voltage. Such a difference is caused by a nonlinear relationship between the supply voltage and the envelope of the RF output signal. The AM-AM distortion in the RF PA itself can be kept low if it is always operated as a switching amplifier. In other words, the supply voltage of the PA driver stage will be kept high to ensure the switching nature of the amplifier. Besides the AM-AM, the AM-PM distortion will also be presented in the circuit. This distortion is an unwanted phase modulation of the RF output carrier due to the modulation of the supply voltage.
When modulating the PA supply, different operating regions of the transistor produce a nonlinear capacitance and a transconductance. These nonlinear components cause the AM-AM and AM-PM distortion at the output signal. The model is illustrated in Figure 3.
In small supply , operates in the deep-triode region and occupies extremely small voltage . When is large enough to turn completely on, can be used for current driving and obtaining a significant voltage headroom . According to the statement above, the voltage is expressed as
where V, and is the ratio of the maximum peak-drain voltage of to . Besides, the capacitance and transconductance of can be given by
where is the built-in potential of the body diode, is the output capacitance as , and is gate-to-source voltage of . Equations (2) show that the variations of the supply caused a nonlinear voltage . In (4), the voltage can also be expressed as . Combining (2)–(4), the relationship of and against is plotted in Figure 4. The result indicates that the varied supply causes the nonconstant capacitance and the nonconstant tranconductance .
To illustrate the AM-AM and AM-PM distortion, the impedance at the carrier frequency is derived according to the equivalent model and has been given by (5).
where and denote the gate-to-drain capacitance of and angular frequency, respectively. To validate this analysis, the circuit performance was simulated by Agilent ADS simulator, assuming a 0.18 m CMOS technology and the following parameter values: V, Grad/sec, nH, pF, pF, m/m, and the totally inductance of , , and is 2.9 nH. The simulated and theoretical results of are compared in Figure 5. The theoretical result is in good agreement with the simulated result and also indicates that the variant capacitance and the transconductance of bring a nonconstant . The difference between the theoretical result and the simulated result is due to the saturation voltage of transistors and the voltage drops of are neglected. Furthermore, the output drain voltage waveform of suffers from the magnitude and phase errors due to the nonconstant impedance. The PA output signal accompanies with the magnitude and phase errors from the drain node, so-called the AM-AM and AM-PM distortion. The simulated result of the AM-AM and AM-PM distortion is shown in Figure 6.
The result reveals that the relationship of the envelope of the RF output voltage against the supply is nonlinear and the voltage deviation at causes an additional distortion at low envelope levels. When the supply voltage of the amplifier deviates from its optimum value (1.8 V), maximum AM-PM changes by 21 degrees/V and 18° of the phase error down to 0.5 V. In the supply voltage of 0 V to 0.5 V, the AM-PM is highly nonlinear and the phase error is as large as 67°. These characteristics indicate that low envelope levels are harder to reconstruct than high envelope levels.
3. Compensation Methodology
3.1. Improved AM-AM and AM-PM
Since various impedances will cause the nonlinear effect, a constant should be designed to compensate this distortion. To obtain a constant , one of design solutions is to force the transistor to act as a resistor. When the common-gate transistor has been operated as a resistor, it is expected that the nonlinear capacitance and transconductance should be canceled. This requirement is realized by a voltage adder, as shown in Figure 7.
In Figure 7, the adder produces a voltage, which equals the threshold voltage plus the supply , on the gate node of and therefore will be operated as a triode-mode resistor. During supply modulation the output voltage of the adder varied with the supply always forces to operate as a triode-mode resistor while is a switch. Therefore, a constant is obtained and its simulated result is shown in Figure 8. The result shows that the voltage is linearized and hence a constant is obtained.
The results of the PA with and without the AM-AM and AM-PM compensation are compared in Figure 9. When the PA has the compensation, the relationship of the envelope of the output voltage against the supply voltage is linear and the AM-PM in the supply voltage of 0.5 V to 1.8 V is improved from 18° to 3°. Therefore, the proposed methodology evidently has compensated the AM-AM and AM-PM distortion of the PA during supply modulation.
3.2. Efficiency Analysis
One more advantage of the transistor operating as a resistor is to pull up drain efficiency in low supply voltage and extend the operating supply range. The DC current () in  can be rewritten by (6), where means the finite drain-to-source voltage during the transistor conducting and is the source terminal resistance. Drain efficiency of the PA can be expressed by (7). When the PA with or without the proposed compensation methodology is operating on the identical conditions of and , drain efficiency is inversely proportion to :
Figure 10 shows the results of and drain efficiency versus the supply voltage. In small supply voltage, the value of the PA with compensation is less than the PA without compensation and therefore drain efficiency of the PA is increased. The maximum improvement of 15% is achieved at V. This improvement benefits the operation of the PA in low supply voltage. In other words, the proposed methodology can extend the operating supply range during supply modulation since the PA has the slightly degradation in drain efficiency in high supply voltage. The results of power gain and output power against the supply voltage are also reported in Figure 11, where the input driving power is 6 dBm. When the amplifier is compensated, the power gain and output power of the PA are not degraded. The result indicates that the AM-AM and AM-PM distortion of the class-E power amplifier is compensated without degrading the circuit performance.
A fully integrated cascode class-E power amplifier with a self-biased control circuit for compensating the AM-AM and AM-PM distortion has been implemented in a 0.18 m CMOS technology, as shown in Figure 12. The amplifier operates at 2.6 GHz from a 1.8 V supply voltage and, to obtain the expected voltage , the self-biased control circuit is applied by 3.3 V supply voltage. The 50 load resistance is downconverted by means of the - network. The series of - are implemented to improve power efficiency . A way to minimize the power loss is to tune out the capacitive parasitics by the inductor , resonating parasitic capacitances on node at the desired frequency of operation. A blocking capacitor is inserted between the inductor and ground. For highly integration, all of passive devices are implemented by the internal components. Considering the electrical performance of internal inductors, they have an allowed current density of 1 mA/m at the temperature of 85°C and internal inductors have a maximum metal width of 20 m, a thickness of 2 m. Therefore, avoiding the metal damage of , the PA was designed to have an allowed current capacity. Hence, the large output power and drain efficiency are not the major design targets in this amplifier. The aspect sizes of the transistor and are 1080/0.18 m/m.
The self-biased control circuit tends to produce a voltage, the sum of a DC voltage and an analogue voltage. It is implemented by a voltage adder, including an operating amplifier with several resistors. Selecting the ratio of resistors, the expected output voltage is obtained. Besides, the operating amplifier has the unit-gain frequency of 100 MHz for achieving a correct output voltage of the self-biased control circuit during supply modulation. The control circuit is just to produce a gate biasing voltage of , so that it only draws few micro amperes from the 3.3 V supply.
5. Experimental Results
Fabricated prototypes have been measured by the probe testing. The chip photomicrograph is reported in Figure 13. Total die area is 1.6 mm². Figure 14 shows the measured characteristics of the AM-AM and AM-PM of the PA. The phase error is reduced down to 5° as is swept from 0.7 V to 1.8 V. A linear voltage relationship is also obtained and there is a small deviation in low supply voltage, from 0 V to 0.3 V. As expected, the AM-AM and AM-PM distortion of the class-E PA has been compensated by using proposed design methodology. The prototype delivers an output power of 12 dBm with a 1.8 V supply voltage and an input driving power of 6 dBm. The output power can be regulated by changing the supply voltage of the amplifier. Figure 15 shows the measured output power (), drain efficiency (DE), and power-added efficiency (PAE) versus . Drain and power-added efficiencies are defined as follows [17, 18]:
where and are the power drawn from the supply by the control circuit and PA stage, respectively.
The output power increases proportionally to , varying from dBm to 12 dBm, as is swept from 0.3 V to 1.8 V. In small supply voltage, the transistors can not be completely on so that the amplifications of the RF signal are not available. Drain efficiencies are close to 20% in of 0.5 V to 1.8 V. As the supply voltage below 0.6 V, the PAE has seriously reductions, whereas the PAE reduces when the output power becomes comparable to the input power. Due to the targeted output power reduced from 16 dBm to 12 dBm, the maximum PAE is also reduced to 16.6%. The output power and power gain versus the input power are also reported in Figure 16. The PA has the output power of 12 dBm and power gain of 6 dB with an input driving power of 6 dBm. When is above 7 dBm, the power gain of the PA is degraded to 5 dB. The result of the output power versus frequency is shown in Figure 17. The output power is above 12 dBm in the 2.3 GHz to 2.8 GHz frequency band, leading the power amplifier to operate in a wide frequency band. The maximum PAE in this wide frequency band is 23.5%.
The design proposed here shows that the AM-AM and AM-PM distortion of the cascode class-E PA has been compensated by a self-biased control circuit without dissipating more power. However, because of the concern of an allowed current capacity on the top metal layer, the aspect sizes of the transistors for efficiency optimization are difficult to achieve. Therefore, the equivalent series resistances of the transistor are large when the transistor is on, so that there is reduction on the drain voltage waveform and the output power. Due to the reduction of the output power, the efficiency of the amplifier is also reduced.
6. System Verification
A system cosimulation platform of envelope elimination and restoration (EER) architecture shown in Figure 18 was established to determine the influence of the AM-AM and AM-PM distortion of the cascode class-E PA on system performance. The signal source, an IEEE802.11a-like broadband OFDM transmission with 20 MHz bandwidth and operating at a 2.6 GHz frequency, is generated by an ADS Ptolemy simulator. The histogram of envelope voltage in Figure 19 shows that 93% of envelope voltages are in the range from 0.5 V to 1.8 V with a mean voltage of 1 V, while the request time delay is 2.8 nanoseconds . Using the distortion compensation technique of the cascode class-E PA, the EVM can be improved from dB to dB, and the obtained constellation is shown in Figure 20.
All of results have been summarized on Table 1. It shows that the proposed methodology can effectively compensate the distortion of the PA while the measurement result is also in good agreement with the simulation result.
A cascode class-E PA with a self-biased circuit has been proposed in this paper to achieve the reduction of the AM-AM and AM-PM distortion. We carefully investigated the distortion in cascode class-E PAs, finding that an equivalent triode-resistor by the common-gate transistor is a way to cancel the nonlinear capacitance and the transconductance for the reduction of the AM-AM and AM-PM distortion. A simplified equivalent model is introduced to illustrate the mechanisms of the distortion. Furthermore, a design methodology for compensating this distortion has been identified and a circuit solution has also been proposed. The prototype of 2.6 GHz class-E amplifier, realized in a 0.18 m CMOS technology, has demonstrated that the phase error is reduced down to 5° in the supply voltage of 0.7 V to 1.8 V and the output power of 12 dBm over the 2.3 GHz to 2.8 GHz frequency band from a 1.8 V supply voltage. The EVM of an EER on a system cosimulation is improved from dB to dB.
This work was conducted by the Trans-Wireless Technology Laboratory (TWT Lab.) and sponsored jointly by the Ministry of Education and the National Science Council, Taiwan. The authors would like to thank Dr. K. W. Huang of National Nano-Device Laboratory (NDL), Taiwan, for chip testing.
- T. Sowlati, C. A. T. Salama, J. Sitch, G. Rabjohn, and D. Smith, “Low voltage, high efficiency class E GaAs power amplifier for wireless transmitters,” IEEE Journal of Solid-State Circuits, vol. 30, no. 10, pp. 1074–1080, 1995.
- M. Talonen and S. Lindfors, “System requirements for OFDM polar transmitter,” in Proceedings of the European Conference on Circuit Theory and Design, vol. 3, pp. 69–72, Cork, Ireland, August-September 2005.
- K.-C. Tsai and P. R. Gray, “1.9-GHz, 1-W CMOS class-E power amplifier for wireless communications,” IEEE Journal of Solid-State Circuits, vol. 34, no. 7, pp. 962–970, 1999.
- K. L. R. Mertens and M. S. J. Steyaert, “A 700-MHz 1-W fully differential CMOS class-E power amplifier,” IEEE Journal of Solid-State Circuits, vol. 37, no. 2, pp. 137–141, 2002.
- C. Yoo and Q. Huang, “A common-gate switched 0.9-W class-E power amplifier with 41% PAE in 0.25-m CMOS,” IEEE Journal of Solid-State Circuits, vol. 36, no. 5, pp. 823–830, 2001.
- A. Shirvani, D. K. Su, and B. A. Wooley, “A CMOS RF power amplifier with parallel amplification for efficient power control,” IEEE Journal of Solid-State Circuits, vol. 37, no. 6, pp. 684–693, 2002.
- S. D. Kee, I. Aoki, A. Hajimiri, and D. Rutledge, “The class-E/F family of ZVS switching amplifiers,” IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 6, pp. 1677–1690, 2003.
- A. Mazzanti, L. Larcher, and R. Brama, “Analysis of reliability and power efficiency in cascode class-E PAs,” IEEE Journal of Solid-State Circuits, vol. 41, no. 5, pp. 1222–1229, 2006.
- N. O. Sokal and A. D. Sokal, “Class E-A new class of high-efficiency tuned single-ended switching power amplifiers,” IEEE Journal of Solid-State Circuits, vol. 10, no. 3, pp. 168–176, 1975.
- F. H. Raab, “Effects of circuit variations on the class e tuned power amplifier,” IEEE Journal of Solid-State Circuits, vol. 13, no. 2, pp. 239–247, 1978.
- N. O. Sokal, “Class E high-efficiency power amplifiers, from HF to microwave,” in Proceedings of the IEEE MTT-S International Microwave Symposium, vol. 2, pp. 1109–1112, Baltimore, Md, USA, June 1998.
- K.-W. Ho and H. C. Luong, “A 1-V CMOS power amplifier for bluetooth applications,” IEEE Transactions on Circuits and Systems II, vol. 50, no. 8, pp. 445–449, 2003.
- M. H. Hella and M. Ismail, RF CMOS Power Amplifier: Design and Implementation, Kluwer Academic Publishers, Boston, Mass, USA, 2002.
- T. Sowlati and D. M. W. Leenaerts, “A 2.4-GHz 0.18-m CMOS self-biased cascode power amplifier,” IEEE Journal of Solid-State Circuits, vol. 38, no. 8, pp. 1318–1324, 2003.
- R. E. Zulinsky and J. W. Steadman, “Class E power amplifier and frequency multipliers with finite DC-feed inductance,” IEEE Transactions on Circuits and Systems II, vol. 34, no. 9, pp. 1074–1087, 1987.
- D. K. Choi and S. I. Long, “A physically based analytic model of FET class-e power amplifiers-designing for maximum PAE,” IEEE Transactions on Microwave Theory and Techniques, vol. 47, no. 9, part 1, pp. 1712–1720, 1999.
- F. H. Raab, P. Asbeck, S. Cripps et al., “Power amplifiers and transmitters for RF and microwave,” IEEE Transactions on Microwave Theory and Techniques, vol. 50, no. 3, pp. 814–826, 2002.
- Y. Tan, M. Kumar, J. K. O. Sin, L. Shi, and J. Lau, “900-MHz fully integrated SOI power amplifier for single-chip wireless transceiver applications,” IEEE Journal of Solid-State Circuits, vol. 35, no. 10, pp. 1481–1486, 2000.
- F. H. Raab and D. J. Rupp, “Class-S high-efficiency amplitude modulator,” RF Design, vol. 17, no. 5, pp. 70–74, 1994.
Copyright © 2009 Wen An Tsou et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.