Theoretical and Experimental Results of Substrate Effects on Microstrip Power Divider Designs

Abstract

The effects of substrate materials on the design of microstrip power divider are investigated theoretically and experimentally. Three dielectric substrate materials, Duroid 3003, G10/FR4 epoxy Glass, and Duroid 3010, are chosen to be studied. A three-way two-stage power divider is designed at S-band frequency of 2.25 GHz and etched on each studied substrate separately. The substrate effects on the characteristics and performance of the microsrip circuits are studied taking into consideration the large difference in dielectric constant and the dissipation factor. The circuit designs presented here are analyzed using the Genesys CAD program and implemented and tested experimentally. The simulated and measured results are compared and discussed, and they indicate that significant changes in the characteristics of the microstrip power divider are observed.

1. Introduction

The power divider technology has undergone a substantial change over the past decade, due to smaller size, lighter weight, potentially lower cost, high reliability, broad bandwidth capability, and function reproducibility [1, 2]. When selecting a suitable substrate material, factors to be considered in the designs of the microstrip power dividers are cost, availability, ease of machining, and etching. There are a whole range of mechanical, electrical, thermal, and chemical criteria to be taken into account [3, 4]. Most of these criteria are mechanical stability with high and low storage temperature, thermal expansion similar to that of metals, good electrical properties (homogeneity of 𝜀_𝑟 and high electric insulation strength), chemical resistance and easy workablity with low cost [3]. There is no substrate material that simultaneously fulfils all the above requirements. The best compromise must be found for all applications [5]. The materials commonly used for microwave substrate have dielectric constants typically range from 2.0 to 10.0. Microstrip circuits designed to be fabricated on such dielectric materials will be most compact or pressed because of the wave-slowing action of the electric signal. Usually, this is an advantage, but such small size makes it difficult to fit any conventional discrete parts into microstrip layout. There are Teflon/ceramic mixture with lower dielectric constants, such as 6.0, which produce physical layer microstrip layout; this helps to alleviate the components mounting problem [6].

The present study investigates the effects of the dielectric substrate materials on the design of microstrip power dividers on which they are etched. Duroid 3003, G10/FR4 epoxy glass, and Duroid 3010 substrates are chosen to be studied. The effects of the differences in the dielectric constants and the dissipation factors on circuit design are included.

2. Microstrip Power Divider Designs

A schematic diagram of the two-stage Wilkinson N-way divider is shown in Figure 1.

Figure 1 

Schematic representation of two-stage power divider.

The common port is designated the number 0 and is assumed to be terminated in 𝑍_𝑐. The divider ports are designated the number 1 through N, and each is terminated in 𝑍_𝑑. The characteristic impedance of each quarter-wave line is 𝑍_0,1 and 𝑍_0,2 while the isolation resistors are designated𝑅₁ and 𝑅₂. The justification for the coupling among all transmission lines beyond the first stage of the divider is that such lines would be reasonably separated from one another [7]. Also the junction effects will be neglected. It will be assumed that port 0 (input port) is perfectly matched at the center frequency. Thus, for two-stage hybrid𝑍_0,1=𝑍_0,2𝑁𝑍_𝑐𝑍_𝑑^1/2, (1) where 𝑍_𝑐 and 𝑍_𝑑 are the input and output impedances of the power divider, respectively. For a maximally flat input-output frequency response, the following impedances are𝑍_0,1=𝑁𝑍_𝑐^3/4𝑍_𝑑^1/4,𝑍_0,2=𝑁𝑍_𝑐^1/4𝑍_𝑑^3/4. (2)(3)

The addition of input and output transformers to improve the frequency response is allowed provided that (1) is satisfied with 𝑍_𝑐 and 𝑍_𝑑 referred to terminals of the dividers [7]. Table 1 represents the optimum resistor of two-stage N-way power divider [7].

Table 1 

Optimum resistors of two-stage N-way power divider [7].

The characteristic impedance of the microstrip line 𝑍_0𝐿 may be expressed in terms of line width 𝑤 and substrate thickness ℎ, and effective dielectric constant 𝜀_𝑒 as [4]𝑍_0𝐿=60√𝜀_𝑒ln8ℎ𝑤+𝑤𝑤4ℎforℎ[√≤1120𝜋]𝜀_𝑒𝑤ℎ𝑤+1.393+0.677×lnℎ+1.44⁻¹𝑤forℎ>1, (4) where 𝜀_𝑒=𝜀_𝑟+12+𝜀_𝑟−121+12ℎ𝑤^−1/2 (5) and 𝜀_𝑟 represents relative dielectric constant of the substrate. The dielectric loss 𝛼_𝑑 is given by [4]𝛼_𝑑=𝜋𝜆₀𝑞tan𝛿,𝑁_𝑝/𝑚, (6) where 𝑞=(𝜀_𝑟(𝜀_𝑒−1)/𝜀_𝑒(𝜀_𝑟−1)) and tan𝛿 represents dissipation factor.

Table 2 illustrates the specifications of the studied substrate materials with the dimensions of 50 ohms line for each one.

Table 2 

Specifications of the studied substrates with the dimensions of quarter wavelength line (50 ohms) for each.

2.1. Power Divider with Duroid 3003 and Epoxy Glass Substrates

A 50 ohms, 𝜆_𝑔/4 line at midband frequency of 2.25 GHz is 3.84 mm wide, 21,91 mm long for the Duroid 3003 substrate and 2.47 mm wide, 18.42 mm long for epoxy glass substrate. The main difference between these two substrates is the dissipation factor (tan𝛿). They are near in the dielectric constants and the thickness of the substrate, therefore the layout design is changed in the range of a few millimeters. The dissipation factor does not affect the dimensions of the power divider design, its effect will be clear in the simulated and practical response curves.

Using (2), the impedance design values are 𝑍_0,1=113.975Ω,𝑍_0,2=65.803Ω,𝑅₁=64.954Ω, and 𝑅₂=200Ω, with the input and the output impedances set at 𝑍_1𝑛=𝑍_out=𝑍_𝑑=𝑍_𝑐=50Ω.

Figure 2 shows the schematic diagram of power divider designed on Duroid 3003 or epoxy glass substrate noticing that only the slight differences in the dimensions of the microstrip lines related to the change in dielectric constant and thickness of the used board.

Figure 2 

Schematic diagram of 3-way 2-stage power divider designed on Duroid 3003.

Figures 3 and 4 illustrate the photograph of the designed power dividers etched on Duroid 3003 and epoxy glass substrates, respectively.

Figure 3 

Picture of 3-way 2-stage power divider etched on Duroid 3003 board (Dim. 100mm×55mm).

Figure 4 

Picture of 3-way 2-stage power divider etched on epoxy glass board (Dim. 93mm×49mm).

2.2. Power Divider with Duroid 3010

The main difference between this substrate and the other is the high dielectric constant. The comparison is with the Duroid 3003 because it has approximately the same dissipation factor. A 50 ohms, 𝜆_𝑔/4 line at midband frequency of 2.25 GHz is 1.10 mm wide and 12.71 mm long. Following the same design procedure of power divider, the microstrip lines needed in the design are such thin that it is difficult to be fabricated; therefore the values of 𝑍_0,1 and 𝑍_0,2 are selected to give large dimensions 𝑍_in=25Ω,Z_out=19Ω,Z_0,1=53Ω,Z_0,2=26Ω,R₁=22Ω,𝑅₂=76Ω.

An additional transformation matching line {𝐵} is inserted in the design to transform the impedance {𝐴}=25Ω to 50Ω line {𝐶} for matching purposes. Also an additional 30Ω stub is inserted to transform 19Ω output to the 50Ω line as shown in Figure 5. Figure 6 illustrates the photograph of the power divider etched on Duroid 3010 substrate.

Figure 5 

Schematic diagram of 3-way 2-stage power divider designed on Duroid 3010.

Figure 6 

Picture of 3-way 2-stage power divider etched on Duroid 3010 board (Dim. 110mm×90mm).

3. Experimental Setup

The implemented designs of the studied microstrip power dividers are tested, and their characteristics are found by using the network analyzer 8510 HP. The network analyzer has two ports (1 and 2) that are connected, respectively, to the input and one of the outputs of the tested power divider, while the remaining outputs of the power divider are connected to 50Ω load for each. Voltage standing ratio VSWR, the coupling and the isolation between the power divider input and each output are measured by connecting the power divider input (representing port 1 of a device under test DUT as shown in Figure 7) to port 1 of the network analyzer (𝑎₁ and 𝑏₁), while the each power divider output representing port 2 of DUT is connected to port 2 of the network analyzer (𝑎₂ and 𝑏₂).𝑎₁ and 𝑏₁ represent the incident and reflected or received voltage signals, respectively, at port 1 while 𝑎₂ and 𝑏₂ are the incident and reflected or received voltage signals, respectively, at port 2 of the network analyzer. Based on this setup, the following parameters are measured and the results are displayed directly on the analyzer [4].(a)S₁₁ represents the forward reflection coefficient and S₁₁=b₁/a₁, a₂=0.(b)Input VSWR represents the input match and VSWR=(1+|S₁₁|)/(1−|S₁₁|).(c)S₂₂ represents the reverse reflection coefficient and S₂₂=b₂/a₂, a₁=0.(d)Output VSWR represents the output match and VSWR=(1+|S₂₂|)/(1−|S₂₂|).(e)S₂₁ is the forward transmission coefficient that represents the coupling between the input and output ports and S₂₁=b₂/a₁ when a₂=0.(f)S₁₂ is the reverse transmission coefficient that represents the coupling between the input and output ports and 𝑆₁₂=𝑏₁/𝑎₂ when 𝑎₁=0.

Figure 7 

Block diagram of the experimental setup.

The above procedure is repeated for each tested output of the studied power divider taking into consideration that the calibration of the network analyzer ports should be made before the test beginning, regarding that the reference planes are taken at the power divider ports.

4. Results and Discussion

By the aid of Genesys software package, the previous three designs of microstrip power dividers etched on the studied substrates are simulated and implemented. The characteristics of the implemented designs are determined using the experimental setup discussed in Section 3. Figure 8 shows the simulated and the measured VSWR on Duriod 3003.

(a)

(b)

(c)

Figure 8 

Response curves of 3-way 2-stage power divider printed on Duroid 3003 substrate. (a) Simulated input and output VSWR, (b) and (c) measured input and output VSWR, respectively.

The input VSWR is varying and less than 2 : 1 for frequency range 1.3–2.95 GHz, while the output VSWR is between 1 and 1.5 for the studied frequency range 1.5–3.5 GHz.

Figure 9 illustrates the coupling of the power divider printed on Duroid 3003.

(a)

(b)

Figure 9 

Response curves of 3-way 2-stage power divider printed on Duroid 3003 substrate. (a) Simulated coupling and (b) measured coupling.

The isolation parameter of power divider is shown in Figure 10. Agreement is found between the simulated and measured results, in term of the shape of the curves on Duriod 3003.

(a)

(b)

Figure 10 

Response curves of 3-way 2-stage power divider printed on Duroid 3003 substrate. (a) Simulated isolation and (b) measured isolation.

The corresponding figures to those of the first prototype are shown in Figures 11, 12, and 13 for the power divider printed on epoxy glass substrate.

(a)

(b)

(c)

Figure 11 

Response curves of 3-way 2-stage power divider printed on epoxy glass substrate. (a) Simulated input and output VSWR, (b) and (c) measured input and output VSWR, respectively.

(a)

(b)

Figure 12 

Response curves of 3-way 2-stage power divider printed on epoxy glass substrate. (a) Simulated coupling and (b) measured coupling.

(a)

(b)

Figure 13 

Response curves of 3-way 2-stage power divider printed on epoxy glass substrate. (a) Simulated isolation and (b) measured isolation.

It can be seen that the increase in the split ratio indicates that there is more power lost compared to the first one and is related to higher dissipation factor in the second substrate. Figures 14, 15, and 16 represent the simulated and measured VSWR, coupling and isolation of the third prototype etched on Duroid 3010, respectively.

(a)

(b)

Figure 14 

Response curves of 3-way 2-stage power divider printed on Duroid 3010 substrate. (a) Measured input VSWR and (b) measured output VSWR.

Figure 15 

Measured coupling curve of 3-way 2-stage power divider printed on Duroid 3010 substrate.

Figure 16 

Measured isolation curve of 3-way 2-stage power divider printed on Duroid 3010 substrate.

It is clear that the measured coupling curves agree with the computed curve, and the coupling remains less than −5.3 dB for different ports over the major part of the studied frequencies. The measured results are satisfactory.

It is seen that the most measured results presented in this study have a small shift in the center frequency, this is related to the etching that does not give the exact dimension of the lines. Table 3 compares the obtained results of the main parameters of the studied substrate materials.

Table 3 

Comparison of the studied substrates at 2.25 GHz.

5. Conclusion

The present study has introduced and discussed the effects of three substrate materials: Duroid 3003, epoxy glass, and Duroid 3010 on the characteristics of three-way two-stage microstrip power dividers. The obtained results have indicated that the used Duroid 3010 has seemed better input and output VSWR than the others except the isolation in addition to that the used Duroid 3003 has indicated better characteristics than epoxy glass as observed in Table 3. The availability of the substrate material, its price, the size required, the number of divider needed, and generally the cost are the main parameters to fulfill the design requirements.