Table of Contents
International Journal of Microwave Science and Technology
Volume 2013, Article ID 275289, 5 pages
Research Article

Systematic Design Methodology of a Wideband Multibit Continuous-Time Delta-Sigma Modulator

1Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Fukuoka 819-0315, Japan
2E-JUST Center Kyushu University, 744 Motooka, Fukuoka 819-0315, Japan

Received 14 November 2012; Accepted 5 February 2013

Academic Editor: Ahmed Allam

Copyright © 2013 Awinash Anand et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Systematic design of a low power, wideband and multi-bit continuous-time delta-sigma modulator (CTDSM) is presented. The design methodology is illustrated with a 640 MS/s, 20 MHz signal bandwidth 4th order 2-bit CTDMS implemented in 0.18 µm CMOS technology. The implemented design achieves a peak SNDR of 65.7 dB and a high dynamic range of 70 dB while consuming only 19.7 mW from 1.8 V supply. The design achieves a FoM of 0.31 pJ/conv. Direct path compensation is employed for one clock excess loop delay compensation. In the feedforward topology, capacitive summation using the last opamp eliminates extra summation opamp.