Advanced RF and Analog Integrated Circuits for Fourth Generation Wireless Communications and Beyond
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A Novel Reconfigurable MBOFDM UWB LNA Using Programmable Current Reuse
Abstract
This paper presents a design of a reconfigurable low noise amplifier (LNA) for multiband orthogonal frequency division multiplexing (MBOFDM) ultra wideband (UWB) receivers. The proposed design is divided into three stages; the first one is a common gate (CG) topology to provide the input matching over a wideband. The second stage is a programmable circuit to control the mode of operation. The third stage is a current reuse topology to improve the gain, flatness and consume lower power. The proposed LNA is designed using 0.18 μm CMOS technology. This LNA has been designed to operate in two subbands of MBOFDM UWB, UWB mode1 and mode3, as a single or concurrent mode. The simulation results exhibit the power gain up to 17.35, 18, and 11 dB for mode1, mode3, and concurrent mode, respectively. The NF is 3.5, 3.9, and 6.5 and the input return loss is better than −12, −13.57, and −11 dB over mode1, mode3, and concurrent mode, respectively. This design consumes 4 mW supplied from 1.2 V.
1. Introduction
Ultra wideband (UWB) has many advantages over narrowband technology such as high data rate, low power, low complexity, and low cost technology. When The US Federal Communication Commission (FCC) recognized the potential advantages of UWB, it issued a report that allows UWB use for commercial communication systems in 2002, and its applications can operate in the unlicensed spectrum of 3.1–10.6 GHz [1]. UWB supports carrierless baseband signals such as impulseradio IRUWB, and it supports wideband with carrier such as multiband orthogonal frequency division multiplexing MBOFDM UWB [2]. In MBOFDM UWB systems, the spectrum from 3.1 to 10.6 GHz is divided into 14 subbands of 528 MHz as shown in Figure 1, which supports data rates from 53 to 480 Mbps [3, 4].
In order to roam across different subbands, devices that support multinetwork applications are required. There is a strong motivation on using single chip supports multiband and multiapplications, due to it provides wireless access for users anywhere and anytime. In such reconfigurable devices, the design of low noise amplifier (LNA) is a critical issue because its has effects in the overall system and requirements as high gain, low noise figure (NF), and lower power consumption, with good input and output matching over each band of interest.
Recently, there are some schemes proposed to the multistandard LNAs like parallel, concurrent, wideband, and reconfigurable LNA. The first approach is the parallel architecture that emploies multiple architectures for each band of interest [5]. However, this approach requires large area, different design for each band, and more time. The concurrent and wideband approaches provide multiband simultaneously [6] by providing the input matching, but this approaches pass the large interference the matching network; therefore, increasing the linearity is required [7, 8]. Recently, the reconfigurable approach presents to discrete band and/or concurrent bands [7] to solve the tradeoff between area, power, and cost. Many approaches present a continuous tuning like [8, 9]; it is good for narrowband applications, but it is not applicable for widebands.
This paper proposed a new reconfigurable MBOFDM LNA for UWB systems. The proposed LNA reconfigured over dual widebands and it works as a discrete band or concurrent based on the programmable part. This design based on CG topology to provide the input matching over wideband [10, 11], current reuse technique shown in Figure 2 used to provide high and flat gain, and low power consumption [12–14], and programmable circuit to select the band of operation. This paper is organized as follows, the demonstration of the proposed circuit, defect and solution of current reuse technique will be presented in Section 2. Section 3 discusses the simulation results of the proposed LNA. Finally, the conclusion is presented in Section 4.
2. Circuit Design of the Proposed Reconfigurable MBOFDM UWB LNA
The proposed LNA was designed by a standard CMOS process. Figure 3(a) shows the schematic of the LNA. This circuit consists of three stages distinguished by three different blocks in Figure 3(a). The first one, input matching stage in block1 in Figure 3(a), the CG topology used to control the input matching over wideband [11, 15] where the input impedance at resonated with the gatetosource parasitic capacitance of of is , where is the transconductance of transistor . Therefore, the matching bandwidth can be calculated by hence, by controlling the input impedance can be matched to at resonance.
(a)
(b)
Second stage is the programmable switches in block2 in Figure 3(a), actually this stage is proposed to achieve two main tasks. The first task is used to select the branch that will provide the desired band, consequently, the selected band depends on Table 1, where is the center frequency of the selected mode. The other task is used to solve current reuse defect, without using this stage the control of this circuit can be made by transistor and , but when one of them is OFF, and nodes will be shorted, thereby the overall circuit performance will be effected.

To solve this problem the programmable circuit is proposed, when transistor is OFF as shown in Figure 3(b) and nodes will be disconnected.
Finally, the current reuse stage in block3 in Figure 3(a), is used to achieve high and flat gain, and lower power consumption. This architecture was simplified in Figure 2 and it consists of series inductor and shunt capacitor connected to DC cascode transistors and . is used to resonate with gatetosource parasitic capacitance of , , while is selected large in the desired bandwidth to provide high impedance path to block RF signal. Furthermore, when the capacitance is selected large, the transistors and act as two common source (CS) cascaded stage at high frequency [12–14].
3. Simulation Results
Design of the proposed reconfigurable MBOFDM UWB LNA was carried out using Spectre simulator from Cadence Design Suite. The proposed circuit consumes 3.32 mA from 1.2 V supply when it works in single mode, but when it works in concurrent mode it consumes 3.39 mA. The simulation results for Sparameters and NF are illustrated in Figure 4 and Figure 5.
(a)
(b)
(c)
(d)
Figure 4(a) shows the simulated input return loss for different frequency bands based on Table 1. As noticed, is less than −12, −13.57, and −11 dB for UWB mode1 with center frequency 3.432 GHz, UWB mode3 with center frequency 4.488 GHz, and concurrent mode with center frequency 3.96 GHz, respectively. These results depict the input matching network of the proposed LNA under −10 dB, the reason behind this due to CG topology and selection of appropriate value of to resonate with , so the proposed design has a good input matching.
Figure 4(b) presents the reverse isolation between output and input ports over bands of interest, where it is less than −50.5, −44.2, and −52 dB for mode1, mode3, and concurrent mode, respectively. Also the better isolation comes from CG topology, where the input isolated from the output of this topology.
Figure 4(c) illustrates the voltage gain of the proposed LNA. As depicted, the proposed LNA achieves 17.35, 18, and 11 dB for mode1, mode3, and concurrent mode, respectively. The high gain of this LNA is due to current reuse, where the overall transconductance of this design is . However, the gain of concurrent mode is lower than single mode, due to the parallel resistance of branches (output resistance of , series with output resistance of , and are parallel with output resistance of , series with output resistance of , and ). Figure 4(d) shows the output return loss of the reconfigurable LNA where it is under −14.9, −9.6, and −14.2 dB for all modes. The good output matching was achieved due to the selection of appropriate values for output matching network (, , , , , and ). The simulated NF versus bands of interest is shown in Figure 5. As noticed, NF of the proposed LNA achieves 3.49–3.53, 3.9–3.93, and 6.29–6.8 dB for mode1, mode3, and concurrent mode, respectively. The high NF of concurrent mode is due to the number of transistors that are used in this mode.
The performance of the proposed LNA and a comparison with existing architectures are summarized in Table 2. As shown in this table, the proposed LNA provides discrete tuning and concurrent, while the existing techniques either provide discrete, concurrent, or continuous tuning. The voltage gain for the proposed architecture is lower than [8, 9, 16], because they use the cascode and cascade topologies for that they consume higher power when compared with the proposed reconfigurable LNA.
 
S: Single mode; **C: Concurrent mode; ***Con: continuous. 
4. Conclusion
A reconfigurable LNA for MBOFDM UWB receivers is proposed. This LNA works in three modes of operation based on programmable current reuse technique. The detailed operation of the proposed reconfigurable LNA including input matching topology (CG), programmable switches circuit, high gain and low power technique (current reuse), and the noise performance of this circuit was presented. The proposed LNA operates by 1.2 V supply and consumes 3.32 mA for single mode (UWB mode1 or mode3) and 3.39 mA for concurrent mode. Finally, it has been designed by CMOS process.
References
 Federal Communications Commission (FCC), “First Report and Order in The Matter of Revision of Part 15 of the Commission's Rules Regarding Ultra wideband Transmission Systems,” ETDocket 98153, FCC 0248, 2002. View at: Google Scholar
 M. Di Benedetto, T. Kaiser, A. F. Molisch, I. Oppermann, C. Politano, and D. Porcino, UWB Communication Systems a Comprehensive Overview, Hindawi Publishing Co., 2006.
 C. Vennila, G. Lakshminarayanan, and S. Tungala, “Design of reconfigurable UWB transmitter to implement multirate MBOFDM UWB wireless system,” in Proceedings of the International Conference on Advances in Computing, Control and Telecommunication Technologies (ACT '09), pp. 411–413, December 2009. View at: Publisher Site  Google Scholar
 T. Gao, F. Zhou, W. Li, N. Li, and J. Ren, “A 6.2–9.5 GHz UWB receiver for WiMedia MBOFDM,” in Proceedings of the 10th IEEE International Conference on SolidState and Integrated Circuit Technology, pp. 782–784, November 2010. View at: Publisher Site  Google Scholar
 M. A. T. Sanduleanu and M. Vidojkovic, “RF transceiver concepts for reconfigurable and multistandard radio,” in Proceedings of the 1st European Wireless Technology Conference (EuWiT '08), pp. 29–32, October 2008. View at: Google Scholar
 S. Datta, A. Dutta, K. Datta, and T. K. Bhattacharyya, “Pseudo concurrent quadband LNA operating in 900 MHz/1.8 GHz and 900 MHz/2.4 GHz bands for multistandard wireless receiver,” in Proceedings of the 24th International Conference on VLSI Design, pp. 124–129, January 2011. View at: Publisher Site  Google Scholar
 X. Yu and N. M. Neihart, “A 2–11 GHz reconfigurable multimode LNA in 0.13 μm CMOS,” in Proceedings of the IEEE Radio Frequency Integrated Circuits Symposium, pp. 475–478, IEEE, 2012. View at: Google Scholar
 M. ElNozahi, E. SanchezSinencio, and K. Entesari, “A CMOS lownoise amplifier with reconfigurable input matching network,” IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 5, pp. 1054–1062, 2009. View at: Publisher Site  Google Scholar
 Y. Wang, F. Huang, and T. Li, “Analysis and design of a fully integrated IMT—advanced/UWB dualband LNA,” in Proceedings of the International Symposium on Signals, Systems and Electronics (ISSSE '10), vol. 1, pp. 83–86, September 2010. View at: Publisher Site  Google Scholar
 J. F. Chang and Y. S. Lin, “0.99 mW 3–10 GHz commongate CMOS UWB LNA using Tmatch input network and selfbodybias technique,” Electronics Letters, vol. 47, no. 11, pp. 658–659, 2011. View at: Google Scholar
 J. F. Chang and Y. S. Lin, “A 2.76 mW, 310 GHz ultrawideband LNA using 0.18 μm CMOS technology,” in Proceedings of the International Symposium on VLSI Design, Automation and Test (VLSIDAT '11), pp. 188–191, April 2011. View at: Publisher Site  Google Scholar
 A. N. Ragheb, G. A. Fahmy, I. Ashour, and A. Ammar, “A 3.1–10.6 GHz low power high gain UWB LNA. Using current reuse technique,” in Proceedings of the 4th International Conference on Intelligent and Advanced Systems (ICIAS '12), vol. 2, pp. 741–744, 2012. View at: Google Scholar
 Q. Wan and C. Wang, “A design of 3.1–10.6 GHz ultrawideband CMOS low noise amplifier with currentreused technique,” International Journal of Electronics and Communication, vol. 65, no. 12, 2011. View at: Google Scholar
 C. P. Liang, P. Z. Rao, T. J. Huang, and S. J. Chung, “Analysis and design of two lowpower ultrawideband CMOS lownoise amplifiers with outband rejection,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 2, pp. 277–286, 2010. View at: Publisher Site  Google Scholar
 Z. Liu and J. Wang, “A 0.18 μm CMOS reconfigurable multiband multigain low noise amplifier,” in Proceedings of the International Conference on Electric Information and Control Engineering (ICEICE '11), pp. 961–964, April 2011. View at: Publisher Site  Google Scholar
 A. Slimane, M. T. Belaroussi, F. Haddad, S. Bourdel, and H. Barthelemy, “A reconfigurable inductorless CMOS low noise amplifier for multistandard applications,” in Proceedings of the IEEE 10th International Conference on New Circuits and Systems Conference (NEWCAS '12), pp. 57–60, 2012. View at: Google Scholar
Copyright
Copyright © 2013 Ahmed Ragheb et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.