Research Article
Effect of High-Temperature Annealing on Ion-Implanted Silicon Solar Cells
Table 1
Results of PC1D simulation using data in this study.
| | Wafer type | Annealing condition | (mA/cm2) | (mV) | Efficiency (%) | | Temperatur (°C) | Time (min) |
| | P-type | 1000 | 60 | 34.7 | 638.2 | 18.4 | | 90 | 34.4 | 632.1 | 18 | | 1050 | 90 | 33.5 | 616.2 | 17.1 |
| | N-type | 1000 | 60 | 34.5 | 650.9 | 18.5 | | 90 | 34.8 | 652.1 | 18.6 | | 1050 | 90 | 34.7 | 655.9 | 18.6 |
| | N-type (with backside emitter) | 1000 | 60 | 31.1 | 652.1 | 16.7 | | 90 | 31.4 | 652.6 | 16.9 | | 1050 | 90 | 31.6 | 656 | 17.1 |
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