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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2008
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Article
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Tab 3
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Research Article
Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation
Table 3
Comparison between array implementations for IDCT design targeting an XC4VLX40 FPGA.
Array impl.
Flip-flops
Slices
Logic usage (%)
registers
1,687
6,213
34
memory
663
2,724
15