International Journal of Reconfigurable Computing / 2009 / Article / Tab 3

Research Article

Pipeline FFT Architectures Optimized for FPGAs

Table 3

SQNR with different FFT sizes.

FFT sizeInput data widthTwiddle factor widthStage numberSQNR (dB)

R4SDC161616282.29
641616373.49
2561616467.47
10241616561.25

R22SDF161616281.82
641616374.47
2561616468.22
10241616562.68

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