International Journal of Reconfigurable Computing / 2009 / Article / Tab 3

Research Article

An Adaptive Message Passing MPSoC Framework

Table 3

FPGA synthesis result.

Device #Slices #FPGA resources used

NPU 2496 32,50%
Router 683 8,89%
MIPS R3000 1462 19,04%
Other 351 4,57%
Total used 4992 65%

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