A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips

<table>Objective function values (left <i>y</i>-axis)on a <svg height="11.225" id="M76" style="vertical-align:-0.1638pt" version="1.1" viewbox="0 0 33.974998 11.225" width="33.974998" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,10.963)"><path d="M137 343l67 33q37 17 63 17q79 0 129.5 -53t50.5 -131q0 -92 -58 -156.5t-147 -64.5t-147 68t-58 182q0 63 17 119t43 95.5t61.5 72t69 52t67.5 31.5q62 22 128 33l6 -32q-56 -11 -108 -35q-149 -71 -184 -231zM227 337q-47 0 -95 -27q-6 -23 -6 -70q0 -93 36 -155.5
t96 -62.5q53 0 78 45.5t25 105.5q0 68 -35 116t-99 48z" id="x36"></path></g><g transform="matrix(.017,-0,0,-.017,11.996,10.963)"><path d="M528 54l-36 -38l-198 201l-198 -201l-36 38l197 200l-197 201l36 38l198 -202l198 202l36 -38l-197 -201z" id="xD7"></path></g><g transform="matrix(.017,-0,0,-.017,25.748,10.963)"><path d="M137 343l67 33q37 17 63 17q79 0 129.5 -53t50.5 -131q0 -92 -58 -156.5t-147 -64.5t-147 68t-58 182q0 63 17 119t43 95.5t61.5 72t69 52t67.5 31.5q62 22 128 33l6 -32q-56 -11 -108 -35q-149 -71 -184 -231zM227 337q-47 0 -95 -27q-6 -23 -6 -70q0 -93 36 -155.5
t96 -62.5q53 0 78 45.5t25 105.5q0 68 -35 116t-99 48z" id="x36"></path></g>
</svg> NPU array and ratio in percent (right <i>y</i>-axis).</table>

International Journal of Reconfigurable Computing

fig13

Figure 13

Figure 13: A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips 