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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2009
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Article
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Tab 3
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Research Article
A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips
Table 3
FPGA synthesis results.
Module
NPU
Router
Processor
Other
No. of Slices
2496
683
1462
351
% of Slices
14.4
3.9
8.5
2.0