Speeding Up FPGA Placement via Partitioning and Multithreading

Algorithm 1

Pseudocode of the proposed multithreading-based parallelization algorithm.

Partitioning and Multithreading-based Placement() {

(i) Step 1: Main thread

 Multi level 4-way partitioning into subchips

 Subchips added to queue of tasks

(ii) Step 2: Worker threads

 Process tasks concurrently until queue becomes empty

(iii) Step 3: Main thread

 Ultra fast top-level low temperature SA refinement

}