TY - JOUR A2 - Torres, Cesar AU - Caffarena, Gabriel AU - López, Juan A. AU - Leyva, Gerardo AU - Carreras, Carlos AU - Nieto-Taladriz, Octavio PY - 2009 DA - 2009/12/08 TI - Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs SP - 703267 VL - 2009 AB - We address the automatic synthesis of DSP algorithms using FPGAs. Optimized fixed-point implementations are obtained by means of considering (i) a multiple wordlength approach; (ii) a complete datapathformed of wordlength-wise resources (i.e., functional units, multiplexers, and registers); (iii) an FPGA-wise resourceusage metric that enables an efficient distribution of logic fabric and embedded DSP resources. The paper shows (i) the benefits of applying a multiple wordlength approach to the implementation of fixed-pointdatapaths and (ii) the benefits of a wise use of embedded FPGA resources. The use of a complete fixed-point datapathleads to improvements up to 35%. And, the wise mapping of operations to FPGA resources (logic fabric and embeddedblocks), thanks to the proposed resource usage metric, leads to improvements up to 54%. SN - 1687-7195 UR - https://doi.org/10.1155/2009/703267 DO - 10.1155/2009/703267 JF - International Journal of Reconfigurable Computing PB - Hindawi Publishing Corporation KW - ER -