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International Journal of Reconfigurable Computing
Volume 2009, Article ID 703267, 14 pages
http://dx.doi.org/10.1155/2009/703267
Research Article

Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs

1Departamento de Ingeniería Electrónica, Universidad Politécnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain
2Departamento de Sistemas Electrónicos, Universidad Autónoma de Aguascalientes, Ciudad Universitaria s/n, 20100 Aguascalientes, Mexico

Received 25 February 2009; Accepted 28 August 2009

Academic Editor: Cesar Torres

Copyright © 2009 Gabriel Caffarena et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, and Octavio Nieto-Taladriz, “Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs,” International Journal of Reconfigurable Computing, vol. 2009, Article ID 703267, 14 pages, 2009. https://doi.org/10.1155/2009/703267.