Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures

Table 3

Complete implementation results of DRAFT interconnecting 4 PRRs and 4 shared IOs.

	Draft alone			Global system		Free space
	Used	Total	%	Used	%	%
Registers	857	32640	2%	2223	6%	92%
LUT	3470	32640	10%	5150	15%	85%
LUT	3497	32640	10%	5560	17%	83%
FLIP FLOP
DSP48E	0	288	0%	3	1%	99%
BRAM36	0	132	0%	16	12%	88%