Research Article

New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA

Table 3

The results obtained for Step and Step of Level 1.

MDCT ( , , , , )AES ( )DDS ( )T48 ( )JPEG ( )MULTF ( )FIR ( , , )VGA ( )

57%0 1024
338% 0560 732752620
45% 0 192
44% 0
85% 1380013601380
112% 0