Research Article
Montgomery Modular Multiplication on Reconfigurable Hardware: Systolic versus Multiplexed Implementation
Table 2
RSA application (Virtex-5).
| | Freq. (MHz) | RSA decryption | Clock cycles |
| Systolic Architecture | 1024 | 130 | 3.23 ms | 491520 |
| Multiplexed Architecture | 1024 | 90 | 4.36 ms | 393216 |
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