Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT

<table>Detailed data-flow of one FLC during the newly created processing mode: as the data sets were previously stored in DDRII memory, we transferred them back to QDRII memory and processed them in the computing FPGAs. Finally, we stored the resulting data again in DDRII memory.</table>

International Journal of Reconfigurable Computing

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Figure 5

Figure 5: Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT 