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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2012
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Article
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Fig 6
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Research Article
Cellular Automata-Based Parallel Random Number Generators Using FPGAs
Figure 6
Schematic of a hybrid CA/LFSR FPGA implementation. SR16 represent the LUT-based 16-bit shift registers. Combined with the flip-flops (FFs), it forms a 37-bit LFSR.