Research Article
A Dynamically Reconfigured Multi-FPGA Network Platform for High-Speed Malware Collection
Table 6
Synthesis results for 128 b and 64 b VEHs.
| VEH | LUT | Reg. Bits |
| SIP 128 Bit | 1082 | 358 | SIP 64 Bit | 619 | 278 |
| Web Server 128 Bit | 1026 | 586 | Web Server 64 Bit | 663 | 244 |
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