Table of Contents Author Guidelines Submit a Manuscript
International Journal of Reconfigurable Computing
Volume 2012, Article ID 507173, 16 pages
Research Article

Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application

1School of Computing Science, University of Glasgow, Glasgow, G12 8QQ, UK
2Department of Electrical and Computer Engineering, University of Massachusetts Lowell, Lowell, MA 01854, USA

Received 13 October 2011; Accepted 20 December 2011

Academic Editor: Miaoqing Huang

Copyright © 2012 Wim Vanderbauwhede et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


We propose an FPGA design for the relevancy computation part of a high-throughput real-time search application. The application matches terms in a stream of documents against a static profile, held in off-chip memory. We present a mathematical analysis of the throughput of the application and apply it to the problem of scaling the Bloom filter used to discard nonmatches.