Performance Analysis Techniques for Multi-Soft-Core and Many-Soft-Core Systems

<table class="table-group" id="tab1"><tr><td><table class="table"><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr><td align="left">Logic usage</td><td align="center">3443 LCs</td></tr><tr><td align="left">Memory usage</td><td align="center">4096 bits</td></tr><tr><td align="left"><span style="width: 36.212502px;"><svg height="16.6625" id="M1" style="vertical-align:-3.56265pt" version="1.1" viewbox="0 0 36.212502 16.6625" width="36.212502" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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</svg></span></td><td align="center">114 MHz</td></tr><tr class="table-tr"><td colspan="2"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

Synthesis results for the tracing unit on the Ultera Stratix II S180 device.

International Journal of Reconfigurable Computing

tab1

Table 1

Table 1: Performance Analysis Techniques for Multi-Soft-Core and Many-Soft-Core Systems 