Research Article

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Table 7

HW tasks—synthesis results.

HW task Slices Ovhd. (%) FFs Ovhd. (%) LUTs Ovhd. (%) BRAMs Diff. (unit) DSPs Ovhd. (%) FCLK freq. (MHz) VCLK freq. (MHz) VCLK diff. (%)

IDCT MSG SW-HW and HW-HW (×64) 5842 36.27%  2035 17.36%  9953 30.33%  0 0  36 0.00% 137.6  66.3 2.00%
78.65% 20.63% 59.22% −2 38.46% −19.54%

IDCT FIFO SW-HW and HW-HW (×64) 5827 35.92%  2028 16.96%  9933 30.06%  0 0  36 0.00%   137.6   66.3 2.00%
78.20% 20.21% 58.90% −2 38.46% −19.54%

IDCT MEM-BC HW-HW (×64)  6083 41.66%  2180 24.93%  10322 35.03%  0 0  36 0.00% 116.8 66.8 2.45%
85.40% 28.46% 64.84% −2 38.46% −18.83%

IDCT MEM-BC SW-HW (×64)  6023 40.27%  2152 23.32%  10209 33.56%  0 0  36 0.00% 133.2 66.8 2.45%
83.57% 26.81% 63.03% −2 38.46% −18.83%

IDCT MEM-REG SW-HW (×64)  5979 39.18%  2215 26.64% 10077 31.66%  0 0  36 0.00% 133 66.3 3.43%
82.06% 30.83% 60.74% −2 38.46% −19.44%

SHA FIFO SW-HW (×16)  5056 66.15%  3215 8.87% 8566 63.75%  0 0 0 0.00% 204.6 130.1 −14.65%
91.95% 10.14% 80.49% −1 0.00% −15.35%

SHA FIFO SW-HW (×32)  5243 67.03%  3234 9.59%   8799 64.41%  0 0 0 0.00% 165.1 130.1 −16.17%
103.69% 10.60% 87.53% −2 0.00% −15.35%

SHA FIFO SW-HW (×64)  5543 68.63%  3245 9.89% 9149 65.59% 0 0  0 0.00% 151.4 130.2 −16.11%
115.35% 10.94% 94.91% −2 0.00% −15.29%

IDCT TB MSG HW-HW (×64)  1259 672.39%  656 412.50% 1648 499.27%  0 0  0 0.00% 174.4  164.4 −44.72%
899.21% 583.33% 610.34% −1 0.00% −45.09%

IDCT TB FIFOHW-HW (×64)  1249 666.26%  644 403.13% 1630 492.73% 0 0 0
0.00%  165  164.4 −44.72%
891.27% 570.83% 602.59% −1 0.00% −45.09%

IDCT TB MEM-BC HW-HW (×64)  1400 709.25%  746 436.69%  1840 538.89%  0 0 0 0.00%  185.6 183.3 −38.37%
929.41% 597.20% 651.02% −1 0.00% −38.78%

Unless indicated otherwise, the values in the table are unitless.