Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence

Algorithm 4

EAC heuristic: Compute_URAM(), Compute_ULAM(), Compute_DRAM() and Compute_DLAM().

 input: RAM (for URAM and DRAM computation) and

    LAM (for ULAM and DLAM computation)

   output: URAM, ULAM, DRAM and DLAM

1     for  𝑖=0⋯𝐻_𝑥−1  do

2  for  𝑗=0⋯𝐻_𝑦−1  do

3   width←RAM[x][y];           /* when computing URAM/DRAM or */

3   width←LAM[x][y];               /* when computing ULAM/DLAM */

4   area_max←width;

5   𝑘←𝑗;

6   while  width>0  do

7    area←0;

8    while  𝑘<𝐻_𝑦 and 𝑘≥0 and

      RAM[i][k] ≥width         /* when computing URAM/DRAM or */

      LAM[i][k] ≥width             /* when computing ULAM/DLAM */

      do

9      area←area+width;

10     𝑘←𝑘+1;                /* when computing URAM/ULAM or */

10     𝑘←𝑘−1;                /* when computing DRAM/DLAM */

11    end while

12    if  area>area_max  then

13        area_max←area;

14     end if  

15     width←width−1;

16   end while

17  end for

18  end for

19   URAM[x][y]←area_max;              /* when computing URAM or */

19   ULAM[x][y]←area_max;                 /* when computing ULAM or */

19   DRAM[x][y]←area_max;                 /* when computing DRAM or */

19   DLAM[x][y]←area_max;                          /* when computing DLAM */