Research Article
XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware
Table 3
Step 1 output is rearranged and then decomposed into RT and CT.
| | Encoder state | | |
| | 00000 | 0 | 0 | | 00100 | 0 | 0 | | 01001 | 0 | 0 | | 01101 | 0 | 0 | | 00010 | 0 | 1 | | 00110 | 0 | 1 | | 01011 | 0 | 1 | | 01111 | 0 | 1 | | 00011 | 1 | 0 | | 00111 | 1 | 0 | | 01010 | 1 | 0 | | 01110 | 1 | 0 | | 00001 | 1 | 1 | | 00101 | 1 | 1 | | 01000 | 1 | 1 | | 01100 | 1 | 1 |
|
|
