Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

Figure 15

Average data latency in the COTSon framework when using the matrix multiplication benchmark with 512 as the matrix size and 32 KiB as the cache size. We varied the number of nodes of the distributed system and the Linux distribution (“xenv0” = Ubuntu 16.04, “karmic64” = Ubuntu 9.10, “trusty-axmv3” = Ubuntu 14.04, and “tfxv4” = Ubuntu 10.10). The data access latency of “xenv0” is improved when we have more nodes. This improvement has less impact on total cycles (Figure 12) than the impact of kernel activity (Figure 11).