Research Article
A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor
Table 3
Resource utilization in the EU-swapping experiment.
| | | Component | LUT | FF | BRAM | DSP |
| | (a) | Divide RM | 3,273 | 6,546 | 0.0 | 0 | | (b) | Sqrt-Sin Cos RM | 3,063 | 6,126 | 0.0 | 0 | | (c) | Sqrt-NatExp-Multiply RM | 3,055 | 6,110 | 2.5 | 25 | | (d) | DPR design (complete with Divide RM) | 4,575 | 9,150 | 4.0 | 3 | | (e) | DPR design (static part): (d) − (a) | 1,302 | 2,604 | 4.0 | 3 | | (f) | Pblock for DPR | 3,800 | 7,600 | 10.0 | 30 | | (g) | DPR design (effective): (e) + (f) | 5,102 | 10,204 | 14.0 | 33 | | (h) | Equivalent non-DPR design | 8,607 | 17,214 | 5.5 | 28 | | (i) | DPR vs. non-DPR: (g) − (h) | −3,505 | −7,010 | +8.5 | +5 |
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