Exposing End-to-End Delay in Software-Defined Networking

<table class="fixed-width table-group" id="tab2"><tr><td><table class="table"><colgroup><col style="width:6.64em"/><col style="width:16.98em"/></colgroup><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr class="thead"><td class="align_left">Item </td><td class="align_center"> Controller </td></tr><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr><td class="align_left">Motherboard</td><td class="align_center"> Asus P9X79 WS (INTEL C222)</td></tr><tr><td class="align_left">CPU</td><td class="align_center"> Intel Xeon E3-1230v3 (4 cores, 3.3GHz)</td></tr><tr><td class="align_left">RAM</td><td class="align_center"> DDR3 ECC 32GB (1600MHz)</td></tr><tr class="table-tr"><td colspan="2"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

<div>The hardware configuration of the controller.</div>

International Journal of Reconfigurable Computing

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Table 2

Table 2: Exposing End-to-End Delay in Software-Defined Networking 