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International Journal of Reconfigurable Computing
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Special Issues
International Journal of Reconfigurable Computing
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2020
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Article
/
Tab 1
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Research Article
FPGA Implementation of A
Algorithm for Real-Time Path Planning
Table 1
Design of the data structure.
Name
Data type
Explanation
Signed integer
The cost value from the start node to current node
h
Signed integer
The estimated cost value from current node to the goal node
parent_
i
Unsigned short
Horizontal coordinate of parent’s node
parten_
j
Unsigned short
Vertical coordinate of parent’s node
in_open_list
Bool
Whether current node is in the OPEN list
is_obstacle
Bool
Whether current node is obstacle