International Journal of Reconfigurable Computing

Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2011)


Publishing date
21 Sep 2012
Status
Published
Submission deadline
04 May 2012

Lead Editor

1INAOE, 72000 Puebla, PUE, Mexico

2Virginia Tech, Blacksburg, VA 24061, USA

3Karlsruhe Institute of Technology, 76131 Karlsruhe, Germany


Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2011)

Description

In 2011, ReconFig continued to provide a leading edge forum for researchers and engineers from across the world to present their latest research and to discuss future research and applications. The conference (http://www.reconfig.org/) promotes the use of reconfigurable computing and FPGA technology for research, education, and applications, covering from hardware architectures and devices to custom computers and high-performance systems. ReconFig 2011 covered a broad spectrum of topics from hardware architectures and devices to custom computers and high-performance systems. Potential topics include, but are not limited to:

  • Models, methods, tools, and architectures for reconfigurable computing
  • Compilation, simulation, debugging, synthesis, verification, and test of reconfigurable systems
  • Field programmable gate arrays and other reconfigurable technologies
  • Evolvable hardware and dynamic reconfiguration
  • Algorithms implemented on reconfigurable hardware
  • Reconfigurable computing education
  • Reconfigurable computing applications
  • High-performance reconfigurable computing
  • Reconfigurable computing for security and cryptography
  • Reconfigurable computing for DSP and communications
  • Multiprocessor systems and networks on chip
  • Reconfiguration techniques
  • Productivity environments and high-level languages
  • Controversy track: FPGAs versus GPUs
  • FPGA applications in power electronics and drives

From the total of 144 papers that were submitted for review to ReconFig 2011, 51 were accepted for oral presentation at the conference. For this special issue, authors of the top 20 papers will be invited to submit an extended version. The criteria for paper selection will be based on papers that stand out in terms of quality of the research and the presentation of the results, originality, and potential scientific impact ensuring a diverse range of topics of representative of important and growing research areas of reconfigurable computing and FPGAs.

Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/ijrc/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:


Articles

  • Special Issue
  • - Volume 2013
  • - Article ID 597323
  • - Editorial

Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011)

René Cumplido | Peter Athanas | Jürgen Becker
  • Special Issue
  • - Volume 2013
  • - Article ID 905057
  • - Research Article

Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence

Xabier Iturbe | Khaled Benkrid | ... | Imanol Martinez
  • Special Issue
  • - Volume 2013
  • - Article ID 453173
  • - Research Article

Analysis of Fast Radix-10 Digit Recurrence Algorithms for Fixed-Point and Floating-Point Dividers on FPGAs

Malte Baesler | Sven-Ole Voigt
  • Special Issue
  • - Volume 2013
  • - Article ID 340316
  • - Research Article

Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units

João Bispo | Nuno Paulino | ... | João Canas Ferreira
  • Special Issue
  • - Volume 2012
  • - Article ID 236372
  • - Research Article

Configurable Transmitter and Systolic Channel Estimator Architectures for Data-Dependent Superimposed Training Communications Systems

E. Romero-Aguirre | R. Parra-Michel | ... | A. G. Orozco-Lugo
  • Special Issue
  • - Volume 2012
  • - Article ID 961950
  • - Research Article

High-Level Design Space and Flexibility Exploration for Adaptive, Energy-Efficient WCDMA Channel Estimation Architectures

Zoltán Endre Rákossy | Zheng Wang | Anupam Chattopadhyay
  • Special Issue
  • - Volume 2012
  • - Article ID 368351
  • - Research Article

Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic

Michael Schaeferling | Ulrich Hornung | Gundolf Kiefer
  • Special Issue
  • - Volume 2012
  • - Article ID 162404
  • - Research Article

HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs

Andrew G. Schmidt | Neil Steiner | ... | Ron Sass
  • Special Issue
  • - Volume 2012
  • - Article ID 439021
  • - Research Article

A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication

Lyndon Judge | Suvarna Mane | Patrick Schaumont
  • Special Issue
  • - Volume 2012
  • - Article ID 196761
  • - Research Article

Multidimensional Costas Arrays and Their Enumeration Using GPUs and FPGAs

Rafael A. Arce-Nazario | José Ortiz-Ubarri
International Journal of Reconfigurable Computing
 Journal metrics
Acceptance rate27%
Submission to final decision18 days
Acceptance to publication23 days
CiteScore2.000
Impact Factor-
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