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FPGAs for Domain Experts

Call for Papers

Field-Programmable Gate Arrays (FPGAs) have recently gained a lot of attention through several demonstrations of superior performance over off-the-shelf architectures, not only with respect to energy efficiency but also with respect to wall-clock runtimes. From once being used primarily as prototyping devices or in embedded systems, FPGAs are now increasingly accepted as first-order computing devices on desktops and servers. This change has been driven by a combination of increasingly larger and resourceful FPGAs and wider availability of mature and stable high-level FPGA programming tools.

The application areas reach across many domains from high-finance to advanced machine learning. Despite the availability of many tools for high-level synthesis and increasing ease of access to FPGA-based computing nodes (e.g., via Amazon Web Services), domain experts still seem to be far away from utilising FPGAs to gain processing performance unless preconfigured systems for their particular applications exist in readily available form. CPUs and to some extent GPUs now as well are still generally considered the only viable options for domain experts looking to accelerate their applications.

Against this background there has been considerable research in recent months and years on making FPGAs accessible for domain experts. With this special issue, we will try to bring together work that aims to break this barrier for a wider applicability of FPGAs.

This special issue aims to encourage contributions from researchers and practitioners that share the vision of enabling domain experts to benefit from the performance opportunities of FPGAs.

We expect this special issue to broadly target three communities of researchers: FPGA and reconfigurable computing researchers, compiler experts, and domain experts from various fields who are investigating the use of FPGAs for accelerating their applications.

Potential topics include but are not limited to the following:

  • Domain-specific languages that target FPGAs
  • Tool-chains for compiling DSLs to FPGAs
  • FPGA Compilation of legacy codes
  • Programming productivity for FPGAs
  • Targeting FPGAs in the cloud
  • Performance portability between different FPGA platforms
  • Just-in-time hardware synthesis
  • Performance portability between CPU, GPU, and FPGA-based systems

Authors can submit their manuscripts through the Manuscript Tracking System at https://mts.hindawi.com/submit/journals/ijrc/fpgas/.

Submission DeadlineFriday, 10 May 2019
Publication DateSeptember 2019

Papers are published upon acceptance, regardless of the Special Issue publication date.

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