Table of Contents
ISRN Signal Processing
Volume 2011, Article ID 272768, 7 pages
http://dx.doi.org/10.5402/2011/272768
Research Article

New Adder-Based RNS-to-Binary Converters for the { 2 𝑛 + 1 + 1 , 2 𝑛 + 1 βˆ’ 1 , 2 𝑛 } Moduli Set

Department of Computer Science, Faculty of Mathematical Sciences, University for Development Studies, P.O. Box 24, Navrongo, Ghana

Received 24 March 2011; Accepted 12 April 2011

Academic Editors: C.-C. Hu and P. Szolgay

Copyright © 2011 Kazeem Alagbe Gbolagade. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

We investigate Residue Number System (RNS) to binary conversion, which is an important issue concerning the utilization of RNS numbers in Digital Signal Processing (DSP) applications. We propose two new reverse converters for the moduli set { 2 𝑛 + 1 + 1 , 2 𝑛 + 1 βˆ’ 1 , 2 𝑛 } . First, we simplify the Chinese Remainder Theorem (CRT) to obtain a reverse converter that uses mod- ( 2 𝑛 + 1 βˆ’ 1 ) operations instead of mod- ( 2 𝑛 + 1 + 1 ) ( 2 𝑛 + 1 βˆ’ 1 ) operations required by other state-of-the-art equivalent converters. Next, we further reduce the hardware complexity by making the resulting reverse converter architecture adder based. Two hybrid Cost-Efficient (CE) and Speed-Efficient (SE) reverse converters are proposed. These two hybrid converters are obtained by combining the best state-of-the-art converter with the newly introduced area-delay efficient scheme. The proposed hybrid CE converter outperforms the best state-of-the-art CE converter in terms of delay with similar area cost. Additionally, the proposed hybrid SE converter requires less area cost with smaller delay when compared to the best state-of-the-art equivalent SE converter.