Table of Contents
ISRN Machine Vision
Volume 2012, Article ID 152601, 7 pages
Research Article

An Artificial Cellular Convolution Architecture for Real-Time Image Processing

1Griffith School of Engineering, Griffith University, Nathan Campus, Nathan, QLD 4111, Australia
2Machine Intelligence Group, School of Computer Science, Indian Institute of Information Technology and Management-Kerala, Technopark Campus, Thiruvananthapuram 695581, India

Received 20 July 2011; Accepted 28 August 2011

Academic Editors: J. Alvarez-Borrego and S. J. Horng

Copyright © 2012 H. Mahrous and A. P. James. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [2 citations]

The following is the list of published articles that have cited the current article.

  • Satish S Bhairannawar, R Rathan, K B Raja, K R Venugopal, and L M Patnaik, “FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters,” 2012 IEEE International Conference on Computational Intelligence and Computing Research, pp. 1–5, . View at Publisher · View at Google Scholar
  • Md. Jahiruzzaman, Shumit Saha, and Md. Abul Khayum Hawlader, “Dynamically reconfigurable parallel architecture implementation of 2D convolution for image processing over FPGA,” 2015 International Conference on Electrical Engineering and Information Communication Technology (ICEEICT), pp. 1–6, . View at Publisher · View at Google Scholar