Table of Contents
ISRN Materials Science
Volume 2012 (2012), Article ID 543790, 16 pages
http://dx.doi.org/10.5402/2012/543790
Research Article

Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes

Institute of Applied Research, Vilnius University, Sauletekio Avenue 9-III, 10222 Vilnius, Lithuania

Received 8 August 2011; Accepted 19 September 2011

Academic Editors: A. O. Neto and H. Saxén

Copyright © 2012 E. Gaubas et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Technique for barrier evaluation by measurements of current transients induced by linearly increasing voltage pulse based on analysis of barrier and diffusion capacitance changes is presented. The components of the barrier capacitance charging and generation/recombination currents are discussed. Different situations of the impact of deep center defects on barrier and diffusion capacitance changes are analyzed. Basics of the profiling of layered junction structures using the presented technique are discussed. Instrumentation for implementation of this technique and for investigations of the steady-state bias infra-red illumination and temperature dependent variations of the barrier capacitance charging and generation/recombination currents are described. Applications of this technique for the analysis of barrier quality in solar cells and particle detectors fabricated on silicon material are demonstrated.