International Scholarly Research Notices / 2012 / Article / Fig 12

Research Article

Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes

Figure 12

(a) A family of transients, measured by varying LIV pulse ramp, fitted by simulated ones, when minimum for least-square deviations between simulated and experimental transients has been obtained. The set of parameters π‘ˆ 𝑏 𝑖 , 𝑁 D e f and 𝜏 𝑔 has been simultaneously extracted by this fitting procedure. The extracted values are denoted within a legend. (b) Comparison of the fluence dependent variations of the barrier capacitance 𝐢 𝑏 0 measured by BELIV technique employing both reverse (stars) and forward (crosses) LIV pulses at 𝑇 = 3 0 0  K. Values of 𝐢 𝑏 0 obtained for nonirradiated Si diodes of different technology are also shown in (b).

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